ECE : Microprocessors MCQs with Answers

1 .
What is Microprocessor?
A)  A multipurpose PLD that accepts an integer as input
B)  A multipurpose PLD that accepts binary data as input
C)  A multipurpose PLD that accepts whole numbers as input
D)  A multipurpose PLD that accepts prime numbers as input

Correct Answer :   A multipurpose PLD that accepts binary data as input

Explanation : A microprocessor is a multipurpose PLD that accepts binary data as input and processes data according to the instructions, and outputs the result. Binary instructions are read from memory.

2 .
MICR stands for_________
A)  Magnetic Ink Chart Receipt
B)  Magnetic Ink Character Receipt
C)  Magnetic Ink Chart Recognition
D)  Magnetic Ink Character Recognition

Correct Answer :   Magnetic Ink Character Recognition

Explanation : Magnetic ink character recognition is used in banking.

3 .
Which of the following is correct about 8086 microprocessor?
A)  Intel's first x86 processor
B)  Motrola’s first x86 processor
C)  NanoXplore x86 processor
D)  STMICROELECTRONICS’s first x86 processor

Correct Answer :   Intel's first x86 processor

Explanation : The Intel 8086 is Intel’s first x86 processor. They launched the most powerful processor in terms of advanced architecture i.e. 8086 processor in 1978. It has larger memory addressing capability and a powerful instruction set.

4 .
Which of the following is a type of microprocessor?
A)  RISC
B)  EPIC
C)  CISC
D)  All of the above

Correct Answer :   All of the above

Explanation : They are of three types :

CISC : Complex Instruction Set Computer
RISC : Reduced Instruction Set Computer
EPIC : Explicitly Parallel Instruction Computing

5 .
In one's complement 8 bit representation 11111111 represents
A)  -0
B)  +0
C)  -1
D)  +1

Correct Answer :   -0

6 .
Which of the following can be accessed only sequentially?
A)  ROM
B)  Hard disk
C)  Floppy disk
D)  Magnetic tape

Correct Answer :   Magnetic tape

Explanation : Magnetic tape can be accessed only sequentially.

7 .
Binary number 1101.101 is equivalent to decimal number?
A)  13.5
B)  13.75
C)  13.625
D)  13.875

Correct Answer :   13.625

Explanation : Binary .101 equals 0.625 in decimal.

8 .
Expression ++i is equivalent to
A)  i = i - 1
B)  i = i + 1
C)  i = i + 2
D)  i = i + i + i

Correct Answer :   i = i + 1

Explanation : i is incremented by 1.

9 .
The microprocessor of a computer can operate on any information if it is present in ______________ only.
A)  Flag
B)  Main Memory
C)  Secondary Memory
D)  Program Counter

Correct Answer :   Main Memory

Explanation : If the information isn’t in the computer’s main store, the microprocessor can’t do anything with it.

The primary storage area in a computer, also known as main storage or memory, is where data is stored for easy access by the computer’s processor.

Random-access memory (RAM) and memory are frequently used interchangeably to refer to primary or main storage.

10 .
Which of the following technology was used by Intel to design its first 8-bit microprocessor?
A)  TTL
B)  NMOS
C)  PMOS
D)  HMOS

Correct Answer :   PMOS

Explanation : PMOS technology was used for designing the processor because this technology was slow but simple.

11 .
Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier.
[Hint: Construct the truth table for the adder and the multiplier]
A)  Circuit A has more gates than circuit B
A)  
B)  Circuit B has more gates than circuit A
B)  
C)  Circuit A has the same number of gates as circuit B
C)  
D)  None of the above
D)  

Correct Answer :   Circuit A has more gates than circuit B

12 .
An e-mail message can be sent to many recipients.
A)  True
B)  False
C)  Can Not Say
D)  None of the above

Correct Answer :   True

13 .
JCOKE = 3
JCOKE = JCOKE + 1
GO TO (5, 8, 9, 11, 15, 16 18, 20) JCOKE.

After the execution of above statement, the control is transferred to statement number
A)  20
A)  
B)  16
B)  
C)  11
C)  
D)  8
D)  

Correct Answer :   11

Explaination : It is a computed GO TO statement. Since J COKE = 3 + 1 = 4, the control is transferred to statement 11.

14 .
Which of the following addressing method does the instruction, MOV AX,[BX] represent?
A)  direct addressing mode
B)  register addressing mode
C)  register relative addressing mode
D)  register indirect addressing mode

Correct Answer :   register indirect addressing mode

Explanation : In register indirect addressing mode the address of the operand is stored in the register. Since the instruction specifies that the register used to refer to the address is accessed indirectly, it represents the register indirect addressing mode.

15 .
To multiply a number by 8 in 8085 we have to use RAL instruction
A)  once
B)  twice
C)  thrice
D)  four times

Correct Answer :   thrice

Explanation : When RAL instruction is used once the number is doubled.

16 .
IC (instruction cycle), FC (fetch cycle) and EC (executive cycle) are related as
A)  EC = IC + EC
B)  IC = FC + EC
C)  IC = FC - EC
D)  IC = FC + 2EC

Correct Answer :   IC = FC + EC

Explanation : Instruction cycle consists of fetch and execute cycles.

17 .
Which of the following is not a valid variable name in C?
A)  1 a
B)  a 1 2
C)  a b 123
D)  a b c 123

Correct Answer :   1 a

18 .
When .4546 E 5 and .5433 E 7 are to be added in normalized floating point mode
A)  none of the numbers is changed to any other form
B)  .4546 E 5 is changed .004546 E 7 and .5433 E 7 is not changed
C)  .5433 E 7 is changed to 54.33 E 5 and .4546 E 5 is not changed
D)  both the numbers are changed and their exponents are made equal to 6

Correct Answer :   .4546 E 5 is changed .004546 E 7 and .5433 E 7 is not changed

19 .
The size of cache memory in most microcomputers is about
A)  a few bytes
B)  a few kilobytes
C)  a few megabytes
D)  a few gigabytes

Correct Answer :   a few kilobytes

Explanation : Size of Cache memory varies from about 16 K bytes to about 256 K bytes.

20 .
What is the word length of an 8-bit microprocessor?
A)  4-bits – 32 bits
B)  8-bits – 16 bits
C)  8-bits – 32 bits
D)  8-bits – 64 bits

Correct Answer :   8-bits – 64 bits

Explanation : At a time, an 8-bit CPU can process 8 bits of data. Depending on the type of microcomputer, the word length might range from 4 to 64 bits.

21 .
In 8-bit microprocessor, how many opcodes are present?
A)  246
B)  250
C)  256
D)  278

Correct Answer :   246

Explanation : In an 8-bit microprocessor, maximum 28 = 256 opcodes are possible. But it consists of only 246 opcodes.

22 .
For the number A[15:0] = 0110110010001111, A[14:13] is ______ A[3:2].
A)  Less than
B)  Greater than
C)  The same as
D)  Cannot be determined

Correct Answer :   The same as

23 .
The five flags in 8085 are designated as
A)  Z, C, S, P, AC
B)  D, Z, S, P, AC
C)  Z, CY, S, D, AC
D)  Z, CY, S, P and AC

Correct Answer :   Z, CY, S, P and AC

24 .
Which of the following computer memories is fastest?
A)  Primary
B)  Cache
C)  Mass storage
D)  Off line back up

Correct Answer :   Cache

Explanation : Cache memory has a speed of about four times the speed of main memory. It is a small high speed memory.

25 .
During processing the instructions, data, intermediate results and final results in a computer are held in
A)  ALU
B)  CPU
C)  Primary memory
D)  Secondary memory

Correct Answer :   Primary memory

Explanation : Primary memory holds these during processing of instructions.

26 .
The power requirements of a DRAM in active and stand by modes is about
A)  5 mW each
B)  350 mW each
C)  350 mW and 100 mW respectively
D)  350 mW and 5 mW respectively

Correct Answer :   350 mW and 5 mW respectively

Explanation : Power requirement in stand by mode is very low 1000.

27 .
Which of the following is not a valid real constant in C?
A)  -2.3 E 2
B)  -2.3 e 2
C)  -2.3 e - 2
D)  1.2 e 2.0

Correct Answer :   -2.3 E 2

Explanation : In C real constant expressed in exponential form, mantissia and exponent should be separated by e (and not E).

28 .
The number of storage classes in C is
A)  3
B)  4
C)  5
D)  6

Correct Answer :   4

Explanation : C has four storage classes :

1. automatic storage class
2. register storage class
3. static storage class
4. external storage class.

29 .
Which of the following is not true about the address bus?
A)  It is a bidirectional bus
B)  It is 16 bits in length
C)  It consists of control PIN 21 to 28
D)  Lower address bus lines (AD0 – AD7) are called “Line number”

Correct Answer :   It is a bidirectional bus

Explanation : Data bus in the microprocessor is bidirectional but the address bus is unidirectional. AD0 – AD7 are the address lines that can be used for both address and data bus lines.

30 .
Which of the following is true about microprocessors?
A)  It has interfacing circuits
B)  It has an internal memory
C)  It uses Harvard architecture
D)  It contains ALU, CU, and registers

Correct Answer :   It contains ALU, CU, and registers

Explanation : Microprocessors don’t have memory and interfacing circuits. They follow Princeton architecture and they contain ALU, CU, and registers inside them.

31 .
Which of the following is the correct sequence of operations in a microprocessor?
A)  Opcode fetch, memory write, memory read, I/O read, I/O write
B)  I/O read, opcode fetch, memory read, memory write, I/O write
C)  Opcode fetch, memory read, memory write, I/O read, I/O write
D)  I/O read, opcode fetch, memory write, memory read, I/O write

Correct Answer :   Opcode fetch, memory read, memory write, I/O read, I/O write

Explanation : Initially, the opcode is fetched from memory, then memory read and write operations are performed followed by I/O read and I/O write operations.

32 .
The ________ directive instructs the assembler to begin memory allocation for a segment/block/code from the stated address.
A)  ORG
B)  LABEL
C)  GROUP
D)  OFFSET

Correct Answer :   ORG

Explanation : When an ORG is written, the assembler starts the location counter to keep track of the module’s allotted address as specified in the directive.
The location counter is initialized to 0000H if the directive is not present.

33 .
Which of the following is not a microprocessor?
A)  Z8000
B)  PIC1x
C)  Motorola 6809
D)  Zilog Z8

Correct Answer :   PIC1x

Explanation :  Z8000, Motorola 6809, and Zilog Z8 are microprocessors but PIC1x is an 8-bit microcontroller.

34 .
A 37 bit mantissa has an accuracy of
A)  6 decimal places
B)  8 decimal places
C)  10 decimal places
D)  11 decimal places

Correct Answer :   11 decimal places

35 .
DS directive in 8085
A)  Forces the assembler to reserve one byte of memory
B)  Forces the assembler to reserve a specified number of bytes in the memory
C)  Forces the assembler to reserve a specified number of consecutive bytes in the memory
D)  None of the above

Correct Answer :   Forces the assembler to reserve a specified number of consecutive bytes in the memory

36 .
Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable.
A)  BYTE
B)  NIBBLE
C)  WORD (16 bits)
D)  DOUBLEWORD (32 bits)

Correct Answer :   BYTE

37 .
We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete
A)  Set of {AND,OR}
A)  
B)  Set of {EXOR, NOT}
B)  
C)  Set of {AND,OR,NOT}
C)  
D)  None of the above
D)  

Correct Answer :   Set of {AND,OR,NOT}

38 .
In a C expression using assignment operators, relational operators and arithmetic operators, the hierarchy of operations (in the absence of parenthesis) is
A)  Arithmetic, assignment, relational
A)  
B)  Arithmetic, relational, assignment
B)  
C)  Assignment, relational, arithmetic
C)  
D)  Relational, assignment, arithmetic
D)  

Correct Answer :   Arithmetic, relational, assignment

39 .
Which of the following is not a property of TRAP interrupt in microprocessor?
A)  It is of highest priority
B)  It is a vectored interrupt
C)  It uses edge-triggered signal
D)  It is a non-maskable interrupt

Correct Answer :   It uses edge-triggered signal

Explanation : TRAP interrupt in 8085 microprocessor uses both level and edge-triggered clock because it is of highest priority among all the interrupts.

40 .
Which of the following is a property of RST 7.5 interrupt?
A)  It has 3rd highest priority
B)  It uses level-triggered signal
C)  It is a non-maskable interrupt
D)  Its vectored address is 003C H

Correct Answer :   Its vectored address is 003C H

Explanation : RST 7.5 is a maskable interrupt with 2nd highest priority after RST-4.5. It uses only the edge-triggered signal. It is a vectored interrupt and its vectored address is 003C H.

41 .
Most of the memory chips in static RAM
A)  need 2 V supply
B)  need 5 V supply
C)  need 12 V supply
D)  do not require any supply

Correct Answer :   need 5 V supply

Explanation : Digital chips need 5 V supply.

42 .
The interface chip for 8086 and 16 bit ADC is
A)  8255
B)  8251
C)  8253
D)  8259

Correct Answer :   8255

Explanation : 8255 is interface chip for 8086 and ADC.

43 .
Which of the following real variable names is not valid in Fortran?
A)  A
B)  BETA
C)  ALPHA
D)  AB * 2

Correct Answer :   AB * 2

Explanation : Operator is not allowed.

44 .
In which computer language is 'break' statement used
A)  C
B)  Pascal
C)  Fortran 77
D)  None of the above

Correct Answer :   C

Explanation : Whenever keyword 'break' is encountered inside any C loop control passes to the first statement after the loop.

45 .
Which of the following flag is used to mask INTR interrupt?
A)  zero flag
B)  sign flag
C)  interrupt flag
D)  auxiliary carry flag flag

Correct Answer :   interrupt flag

Explanation : If the interrupt flag, IF=1, is set, the microprocessor will serve any interrupt. The processor ignores the service if the interrupt flag, IF=0, is set to 0.

46 .
Which of the following is a special-purpose register of microprocessor?
A)  Accumulator
B)  Program counter
C)  Temporary register
D)  Instruction register

Correct Answer :   Program counter

Explanation : Instruction register, accumulator, and temporary register are general-purpose registers but program counter is a special-purpose register because it holds the address of the next instruction.

47 .
Which of the following circuit is used as a special signal to demultiplex the address bus and data bus?
A)  Decoder
B)  Demultiplexer
C)  Address Latch Enable
D)  Priority Encoder

Correct Answer :   Address Latch Enable

Explanation : Address Latch Enable is a positive pulse and it is generated whenever the microprocessor starts an operation to latch the lower order address lines (AD7 to AD0).

48 .
How many flip-flops are there in a flag register of 8085 microprocessor?
A)  4
B)  5
C)  7
D)  12

Correct Answer :   5

Explanation : There are five flags or flip-flops in a flag register in 8085 microprocessor that shows the status after ALU operation. They are mainly affected by the content of the accumulator.

49 .
Which of the following flag condition is used for BCD arithmetic operations in microprocessor?
A)  Sign flag
B)  Zero flag
C)  Parity flag
D)  Auxiliary carry flag

Correct Answer :   Auxiliary carry flag

Explanation : Among all the five flag conditions in microprocessor, the auxiliary carry flag is used internally for BCD arithmetic operations. Based on the auxiliary flag, the instruction set doesn’t contain the conditional jump operation.

50 .
In 8086 the number of bytes which can be addressed directly is about
A)  1000
B)  10000
C)  100000
D)  One million

Correct Answer :   One million

51 .
Which of the following pair of gates can form a latch?
A)  A pair of cross coupled NAND
B)  A pair of cross copled AND
C)  A pair of cross coupled OR
D)  A cross coupled NAND/OR

Correct Answer :   A pair of cross coupled NAND

52 .
Assertion (A): Each memory chip has its own address latch.
Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.
A)  A is wrong R is correct
A)  
B)  A is correct R is wrong
B)  
C)  Both A and R are correct and R is correct explanation of A
C)  
D)  Both A and R are correct but R is not correct explanation of A
D)  

Correct Answer :   A is wrong R is correct

53 .
Whenever a non-maskable interrupt occurs in 8085 microprocessor, which of the following data line contains the data?
A)  2C H
B)  3C H
C)  24 H
D)  36 H

Correct Answer :   24 H

Explanation : TRAP interrupt is a non-maskable interrupt with the highest priority. When it occurs, its vectored address 0024 H is placed on the program counter. 24 H is the lower address bus which also acts as the data bus.

54 .
What does a microprocessor understand after decoding opcode?
A)  Go to memory
B)  Length of the instruction and number of operations
C)  Perform ALU operation
D)  Go to the output device

Correct Answer :   Length of the instruction and number of operations

Explanation : After decoding the opcode of the instruction, a microprocessor understands the length of the instruction and the total number of operations to be performed.

55 .
How many address lines are present in 8086 microprocessor?
A)  16
B)  20
C)  32
D)  40

Correct Answer :   20

Explanation : 8086 microprocessor is a 16-bit microprocessor that uses 20 address lines and 16 data lines. AD0 to AD15 are 16 lower order address lines that can be operated in both address and data bus mode.

56 .
Which of the following is not a status flag in microprocessor?
A)  Index flag
B)  Interrupt flag
C)  Direction flag
D)  Overflow flag

Correct Answer :   Index flag

Explanation : Overflow flag represents whether the result is out of scope or not. Direction flag is used in string operations and interrupt flag is used to enable the interrupts.

57 .
Assertion (A) : Microprocessor 8085 has on-chip oscillator with inbuilt crystal.

Reason (R) : For frequency stability crystal oscillator is preferred.
A)  A is correct R is wrong
A)  
B)  A is wrong R is correct
B)  
C)  Both A and R are correct and R is correct explanation of A
C)  
D)  Both A and R are correct but R is not correct explanation of A
D)  

Correct Answer :   A is wrong R is correct

Explaination : Crystal has to be connected externally to pins 1 and 2 of 8085.

58 .
Consider the following program in Pascal

X = 2.57
X = (X + 0.06) * 10
I = TRUNC (X)
X = I
X = X / 10.0

The final value of X would be
A)  2
A)  
B)  2.6
B)  
C)  2.63
C)  
D)  26.3
D)  

Correct Answer :   2.6

Explaination : Microprocessors

59 .
Which of the following can not be used as a variable name in C?
A)  coal
B)  ram
C)  else
D)  None of the above

Correct Answer :   else

60 .
A 256 x 4 EPROM has
A)  4 address pins and 4 data pins
B)  4 address pins and 8 data pins
C)  8 address pins and 8 data pins
D)  8 address pins and 4 data pins

Correct Answer :   8 address pins and 4 data pins

Explanation : 28 = 256

61 .
To evaluate X = (A + B + 1.2) * (A + B - C) the sequence of operation is
A)  * + + + - =
B)  + + + - * =
C)  + + - * + =
D)  - + + + * =

Correct Answer :   + + + - * =

62 .
In ALU 1C 74181 the addition and subtraction is in
A)  binary
B)  2's complement
C)  1's complement
D)  None of the above

Correct Answer :   2's complement

Explanation : 2's complement is universally used in computers.

63 .
While selecting a memory chip the feature which should be examined is
A)  capacity
B)  ac characteristics
C)  dc characteristics
D)  All of the above

Correct Answer :   All of the above

Explanation : All these characteristics are important.

64 .
EEPROM permits
A)  read operation only
B)  read and byte erase operations
C)  read, byte erase and byte write operations
D)  read, byte erase, byte write and chip erase operations

Correct Answer :   read, byte erase, byte write and chip erase operations

65 .
If A = 20 and B = - 7 in PASCAL, A mod B =
A)  6
B)  3
C)  2
D)  -1

Correct Answer :   6

Explanation : It gives remainder in division operation.

66 .
Which of the following DO statements is invalid in FORTRAN 77?
A)  DO 161 = 1, 15
B)  DO 16 1 = 1, 10, 1
C)  DO 16 I = - 5, 5, 2
D)  All of the above

Correct Answer :   All of the above

Explanation : All are valid.

67 .
Let JCOKE = 98 and LPEPSI = 42 Consider the statement

IF (JCOKE - 3 * LPEPSI) 5, 6, 7
5 JCOKE = JCOKE + 5
6 JCOKE = JCOKE + 8
7 JCOKE = JCOKE + 11

The value of JCOKE after the execution of above statement will be
A)  103
A)  
B)  106
B)  
C)  109
C)  
D)  112
D)  

Correct Answer :   103

Explaination : Since (J COKE - 3 x L PEPSI) is negative, statement 5 is executed and the result is 98 + 5 = 103.

68 .
Assume that x = 5 and y = 2. Then in Java operation x + = y, the result is
A)  x = 2
B)  x = 3
C)  x = 7
D)  None of the above

Correct Answer :   x = 7

Explanation : The operator + = means add and assign.

69 .
Which of the following is not a condition flag?
A)  Zero flag
B)  Trap flag
C)  Parity flag
D)  Auxiliary carry flag

Correct Answer :   Trap flag

Explanation : Trap, direction, and interrupt are the control flags. Carry, parity, auxiliary carry, zero, sign and overflow flags are the condition flags.

70 .
Which of the following register is not used in opcode fetch operations?
A)  Flag register
B)  Program counter
C)  Memory data register
D)  Memory address register

Correct Answer :   Flag register

Explanation : Flag register is not used in opcode fetch operations. It is used to represent the status of ALU operation which is performed after decoding of the opcode.

71 .
A memory connected to a microprocessor has 20 address lines and 16 data lines. What will be the memory capacity?
A)  8 KB
B)  2 MB
C)  16 MB
D)  64 MB

Correct Answer :   2 MB

Explanation : Total number of locations of the memory possible for 20 address lines is 220 and every location has 16/8 = 2 bytes. So, total memory capacity will be 220 × 2 = 2 MB.

72 .
What is the word length of the Pentium-II microprocessor?
A)  8-bit
B)  16-bit
C)  32-bit
D)  64-bit

Correct Answer :   64-bit

Explanation : The Pentium-II microprocessor is a 64-bit microprocessor. It was introduced in 1997 and designed with 7.5 million transistors. Its word length is 64-bit.

73 .
Which of the following is not true about 8085 microprocessor?
A)  It is a 40 pin DIP chip
B)  It has 16 address lines
C)  It is an 8-bit microprocessor
D)  It is manufactured using PMOS technology

Correct Answer :   It is manufactured using PMOS technology

Explanation : 8085 microprocessor is manufactured using NMOS technology. PMOS technology is used in a 4004 microprocessors. NMOS technology is faster than PMOS technology.

74 .
Which of the following is a non-vectored input?
A)  TRAP
B)  RST-6.5
C)  INTR
D)  RST-7.5

Correct Answer :   INTR

Explanation : TRAP, RST-7.5, and RST-6.5 are vectored inputs but INTR is a non-vectored input. It has the least priority and its address is provided by the user using an external device.

75 .
Which of the following addressing mode is used by 8085 microprocessor for array and list operations?
A)  Immediate
B)  Direst
C)  Indexed
D)  Base-Register

Correct Answer :   Immediate

Explanation : Indexed addressing mode is used for array and list operations. It uses a constant value and index register to execute the instruction.

76 .
What is stored in the H & L general-purpose register?
A)  Opcode
B)  Address of memory
C)  Temporary data
D)  Address of next instruction

Correct Answer :   Address of memory

Explanation : H and L are 8-bit general-purpose registers. They are used to store the address of memory. Together they can store a 16-bit address.

77 .
Which of the following is a valid integer constant?
A)  127
B)  127.0
C)  125 + 3
D)  None of the above

Correct Answer :   127

78 .
The expression A2 + B2 - 3 AB when written is Pascal should be written as
A)  A * A + B * B - 3 A * B
A)  
B)  A * A + B * B - 3.0 A * B
B)  
C)  A * A + B * A - 3 * A * B
C)  
D)  A * A + B * B - 3.0 * A * B
D)  

Correct Answer :   A * A + B * B - 3.0 * A * B

79 .
If PRIN = 200.0 and BINT = 0.0525 the result of expression INCOME = PRIN * (1 + BINT) will be
A)  210
B)  210.5
C)  210.50
D)  210.5000

Correct Answer :   210

Explanation : The result should not contain decimal.

80 .
Which has volatile memory?
A)  RAM
B)  Diskette
C)  Hard disk
D)  Magnetic tape

Correct Answer :   RAM

Explanation : RAM has volatile memory and therefore the matter has to be saved frequently.

81 .
Which of the following operations will give the result 2 in C?
A)  4.0 / 2
B)  5 / 2
C)  4 / 2.0
D)  4.0 / 2.0

Correct Answer :   5 / 2

Explanation : Since both 5 and 2 are integers, the result will be 2.

82 .
Which of the following is not valid integer variable in FORTRAN 77?
A)  BRG
B)  MBR
C)  LOTS
D)  JAMMU

Correct Answer :   BRG

Explanation : The first letter is not I, J, K, L, M, N.

83 .
Consider the following tasks in a micro computer

1. Receiving data and instruction
2. Performing arithmetic computation
3. Performing logical computations
4. Storing data and instructions

Which of the above are performed by ALU?
A)  2 only
A)  
B)  2 and 3 only
B)  
C)  1, 2 and 3 only
C)  
D)  All of the above
D)  

Correct Answer :   2 and 3 only

Explaination : ALU performs arithmetic and logical computations.

84 .
Consider the following DO statement in FORTRAN 77

DO 25 J = 1, 7

The number of DO loop executions in the above statement is
A)  1
A)  
B)  6
B)  
C)  7
C)  
D)  8
D)  

Correct Answer :   7

Explaination : Do statement is executed when J = 1, 2, 3, 4, 5, 6, 7, i.e., a total of 7 times.

85 .
If a 90 GB memory has to be connected to a microprocessor, minimum how many address lines are required?
A)  32
B)  36
C)  37
D)  39

Correct Answer :   37

Explanation : 90 GB is greater than 64 GB and less than 128 GB. For 64 GB (236 Bytes), a minimum of 36 address lines are needed. So, for 90 GB, we need 36 + 1 = 37 address lines.

86 .
Which of the following is a software interrupt?
A)  INTR
B)  TRAP
C)  RST-6.5
D)  RST-5

Correct Answer :   RST-5

Explanation : TRAP, INTR, and RST-6.5 are the hardware interrupts but RST-5 is a software interrupt present. All software interrupts are vectored interrupts.

87 .
What is the vectored address of RST-5?
A)  0010 H
B)  0032 H
C)  0028 H
D)  0030 H

Correct Answer :   0028 H

Explanation : Vectored address of RST-n is calculated by the formula n × 8. So, vectored address of RST-5 is (40)10. (40)10 in hexadecimal is (28)16 = 0028 H.

88 .
Which of the following is true about stack pointer?
A)  Stack pointer is an 8-bit register
B)  Stack pointer stores data permanently
C)  Stack pointer is initialized after stack operation
D)  Stack pointer contains the address of the top of the stack memory

Correct Answer :   Stack pointer contains the address of the top of the stack memory

Explanation : Stack pointer is initialized before stack operation, it is a 16-bit register that stores data temporarily. It follows a LIFO operation. So, it contains the address of the top of the stack memory.

89 .
How many address lines are required to connect a 4 KB RAM to a microprocessor?
A)  10
B)  12
C)  16
D)  20

Correct Answer :   12

Explanation : 4 KB RAM is equal to 4096 × 8 bits. Total number locations are (4096 × 8)/8 = 4096 and 4096 = 212. So, 12 address lines are required to connect a 4 KB RAM to a microprocessor.

90 .
Which of the following is true about MOV A, B instruction?
A)  It is a 2-byte instruction
B)  It doesn’t affect the flag register
C)  It uses immediate addressing mode
D)  It means move the content of register A to register B

Correct Answer :   It doesn’t affect the flag register

Explanation : MOV A, B means moving the content of register B to register A. It is a 1-byte instruction and it uses register addressing mode. No flags are affected because operations of this instruction are not performed in the ALU.

91 .
Which of the following is false about LDA instruction?
A)  It has 13 T-states
B)  It is a 3-byte instruction
C)  It doesn’t affect any flags
D)  It uses indirect addressing mode

Correct Answer :   It uses indirect addressing mode

Explanation : LDA is a direct addressing mode instruction which stands for Load Accumulator Direct. It is a 3-byte instruction and it has 13 T-states. No flags are affected by this instruction.

92 .
Using DeMorgan’s Theorem we can convert any AND-OR structure into
A)  NAND-NAND
B)  OR-NAND
C)  NAND-NOR
D)  NOR-NAND

Correct Answer :   NAND-NAND

93 .
If the sign bit of mantissa is 0 and the exponent is increased from a positive to a more negative number the result is
A)  A smaller floating point number
B)  A negative floating point number
C)  A larger floating point number
D)  Either A or C depending on the actual number

Correct Answer :   A larger floating point number

94 .
The operating modes of 8255 A are called
A)  Mode 0 and mode 1
B)  Mode 0 and mode 2
C)  Mode 0, mode 1 and mode 2
D)  Mode 0, mode 2 and mode 3

Correct Answer :   Mode 0, mode 1 and mode 2

95 .
In C the keywords are also called
A)  Class words
B)  Reserved words
C)  Special words
D)  Character words

Correct Answer :   Reserved words

96 .
The forms of IF statements in FORTRAN 77 are called
A)  Logical IF and Block IF
B)  Logical IF and arithmetic IF
C)  Logic IF, block IF, arithmetic IF and negate IF
D)  Logical IF, block IF and arithmetic IF

Correct Answer :   Logical IF, block IF and arithmetic IF

97 .
Which of the following conditions is not allowed in an RS latch?
A)  R is asserted, S is asserted
B)  R is negated, S is negated
C)  R is negated, S is asserted
D)  R is asserted, S is negated

Correct Answer :   R is asserted, S is asserted

98 .
Initially the number decimal 8 is stored. If instruction RAL is executed twice, the final number stored will be
A)  decimal 2
B)  decimals 8
C)  decimal 16
D)  decimal 32

Correct Answer :   decimal 32

Explanation : If instruction RAL is executed once the number gets doubled.

99 .
In Java 31% gives an answer
A)  3
B)  4
C)  3 / 4
D)  4 / 3

Correct Answer :   4

Explanation : Modulus operator gives the remainder of division as answer.

100 .
Assertion (A) : In 8085 SP and PC are 8 bit each.

Reason (R) : 8085 is an 8 bit microprocessor.
A)  A is wrong R is correct
A)  
B)  A is correct R is wrong
B)  
C)  Both A and R are correct and R is correct explanation of A
C)  
D)  Both A and R are correct but R is not correct explanation of A
D)  

Correct Answer :   A is wrong R is correct

Explaination : SP and PC are 16 bit each in 8085.

101 .
Let JCOKE = 3 and LPEPSI = 5. Consider the statement

IF (3 * JCOKE. EQ. LPESPSI)
JCOKE = JCOKE + 2
JCOKE = JCOKE + 5

What will be the final value of JCOKE after the above statement is executed?
A)  16
A)  
B)  10
B)  
C)  8
C)  
D)  4
D)  

Correct Answer :   8

Explaination : The logical IF statement means that IF (3 x J COKE) is equal to (L PEPSI), J COKE = 3 + 2 = 5 otherwise J COKE = 3+5 = 8 Since (3 x J COKE) is more than (L PEPSI), the result is 8.

102 .
A memory chip has 65536 cells in it. Then
A)  time required to access cell is same as that to access cell 65536
B)  time required to access cell is less than that required to access cell 65536
C)  time required to access cell is more than that required to access cell 65536
D)  Either (A) or (B)

Correct Answer :   time required to access cell is same as that to access cell 65536

Explanation : Time required to access different cells is the same.

103 .
Consider the following logical IF statement in FORTRAN 77

IF (SALT. GE. PEPPER) GOTO 11
GOTO 13

The above statement using arithmetic IF statement would be
A)  IF (SALT - PEPPER) 11, 11, 13
A)  
B)  IF (SALT - PEPPER) 13, 11, 13
B)  
C)  IF (SALT - PEPPER) 13, 11, 11
C)  
D)  IF (SALT - PEPPER) 11, 13, 13
D)  

Correct Answer :   IF (SALT - PEPPER) 13, 11, 11

Explaination : The given statement is logical IF statement. If SALT greater than or equal to PEPPER control goes to statement 11 otherwise control goes to statement 13 Same is true of arithmetic IF statement (c). If (SALT - PEPPER) is negative, control goes to statement 13 and otherwise control goes to statement 11.

104 .
Which is of the following is true about STA instruction?
A)  It is a 3-byte instruction
B)  It required three machine cycles
C)  It uses immediate addressing mode
D)  Accumulator is loaded with the content of memory

Correct Answer :   It is a 3-byte instruction

Explanation : STA is a direct addressing mode instruction which stands for Store Accumulator Direct. It is a 3-byte instruction and it requires four machine cycles. In STA instruction memory is loaded with the content of the accumulator.

105 .
DAA instruction is used to perform which type of addition?
A)  Octal addition
B)  Binary addition
C)  BCD addition
D)  Excess-3 addition

Correct Answer :   BCD addition

Explanation : DAA instruction is used to perform BCD addition. DAA instruction changes the binary values of the contents of the accumulator to BCD.

106 .
What does a loader do in a microprocessor?
A)  Decodes an opcode
B)  Converts decimal to binary
C)  Converts hexadecimal code to binary
D)  Increments the content of the program counter by 1

Correct Answer :   Converts hexadecimal code to binary

Explanation : Microprocessor understands only 0s & 1s. So, a loader first converts hexadecimal code to binary form and then loads it to the memory.

107 .
Suppose registers 'A' and 'B' contain 50H and 40H respectively. After instruction MOV A, B, what will be the contents of registers A and B?
A)  40H, 40H
B)  50H, 40H
C)  50H, 50H
D)  60H, 40H

Correct Answer :   40H, 40H

Explanation : Initially, register A contains 50H & B contains 40H. Instruction MOV A, B means move the content of B to A. So, after this operation, both registers A & B will contain 40H.

108 .
For how many times per instruction, the content of the program counter is placed on the address bus?
A)  One time
B)  Two times
C)  Depends on the length of the instruction
D)  Depends on the memory capacity of the processor

Correct Answer :   Depends on the length of the instruction

Explanation : After decoding an opcode the microprocessor understands the length of the instruction. So, the content of the program counter is placed on the address bus as many times as the length of the instruction.

109 .
Which of the following is not correct about HLT instruction?
A)  It is a machine control instruction
B)  It is used to start the execution of the program
C)  PC is disconnected from the address bus
D)  A reset interrupt is required to come out of halt state

Correct Answer :   It is used to start the execution of the program

Explanation : HLT is a machine control statement. Internally, the PC is disconnected from the address bus so, the next fetch is not possible. It is used mainly to stop the execution of the program.

110 .
If initial value of PROD is zero and a program adds X to PROD, Y times we get the result
A)  XY
B)  X + Y
C)  X - Y
D)  X / Y

Correct Answer :   XY

Explanation : Adding X to PROD, Y times evidently gives the product XY.

111 .
Which of the following conditional statements is not valid in Pascal?
A)  If A < = B then A : = C * D
B)  If A > = B then B : = C + D + X
C)  If (N = 45) THEN X : = X + 2 ELSEX : = 0
D)  If (A > = B) X : Y else X : = Z

Correct Answer :   If (A > = B) X : Y else X : = Z

Explanation : 'then' is missing.

112 .
If J = 12 and X = 24.4 the result of the following FORTRAN 77 program will be

READ *, J, X
K = J ** 2
Z = 3 * X
Print *, J, K, Z
A)  12, 144, 73.2
A)  
B)  15. 144. 73
B)  
C)  15.0, 144.0, 73
C)  
D)  15.0, 144.0, 73.2
D)  

Correct Answer :   12, 144, 73.2

Explaination :

J = 12, K = 122 = 144, Z = 3 x 24.4 = 73.2 In the result J and K will be without decimal point.

113 .
A computer program is used to read M and print the sum 2 + 4 + 6 + 8 +.........+ 2M. If M = 9 , the print out will show the number
A)  9
B)  18
C)  90
D)  100

Correct Answer :   90

Explanation : SUM = 2 + 4 + 6 + 8 + 10 + 12 + 14 + 16 + 18 = 90.

114 .
Which of the following is not a data base function?
A)  MAX
B)  DSTDEV
C)  DCOUNT
D)  DAVERAGE

Correct Answer :   MAX

Explanation : MAX is not data base function.

115 .
Consider the following statements about Infix and Post fix notations in Pascal

1. In Infix notation operators appear between the operands on which they operate.
2. In Post fix notation operators appear after the operand.
3. The Infix expression A + B - C + D will appear as AB + C - D + in post fix notation.

Which of the above are correct?
A)  1 and 2 only
A)  
B)  1 and 3 only
B)  
C)  2 and 3 only
C)  
D)  All of the above
D)  

Correct Answer :   All of the above

116 .
If INT = 50 and LOOT = 30, the result of assignment statement SAL = INT + LOOT is
A)  8.0
B)  80
C)  5.0
D)  50

Correct Answer :   80

Explanation : The result should be sum of 50 and 30 and decimal must be added.

117 .
Which of the following is the software for financial accounting?
A)  COBOL
B)  MS WORD
C)  Page maker
D)  DB III plus

Correct Answer :   DB III plus

Explanation : dB III plus is DBMS and not for financial accounting.

118 .
When data required for instruction is present inside the register of a microprocessor then which of the following addressing mode is used?
A)  Direct
B)  Relative
C)  Register
D)  Indexed

Correct Answer :   Register

Explanation : Register addressing mode is used when data is present inside the register of the microprocessor. For example, MOV B, C. Here, B and C are the registers of the microprocessor.

119 .
Which of the following interfacing IC is a DMA controller?
A)  8155
B)  8279
C)  8253/54
D)  8257/37

Correct Answer :   8257/37

Explanation : 8155 is a multipurpose programmable I/O device. 8253/54 is a programmable counter. 8279 is a keyboard/display controller and 8257/37 is a DMA controller.

120 .
Which of the following is a 2-word instruction set?
A)  IN 01H
B)  MOV A, B
C)  LDA 2500H
D)  JMP 2085H

Correct Answer :   IN 01H

Explanation : LDA 2500H and JMP 2085H are 3-word instructions. MOV A, B is a 1-word instruction. IN 01H is a 2-word instruction, the first byte specifies the opcode and the second byte specifies the operand.

121 .
Which memory has read operation, byte erase, byte write and chip erase?
A)  RAM
B)  EEPROM
C)  UVEPROM
D)  Both (B) and (C)

Correct Answer :   EEPROM

122 .
A structure that stores a number of bits taken "together as a unit" is a
A)  Gate
B)  Mux
C)  Register
D)  Decoder

Correct Answer :   Register

123 .
Which of the following is type declaration statement in C?
A)  int bar
B)  s = s + 1
C)  king = horse + 1
D)  prin = prin * prin

Correct Answer :   int bar

124 .
If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory)
A)  Halves
A)  
B)  Doubles
B)  
C)  Remains unchanged
C)  
D)  Increases by 2^(address bits)/addressability
D)  

Correct Answer :   Halves

125 .
The minimum number of transistors required to implement a two input AND gate is
A)  2
B)  4
C)  6
D)  8

Correct Answer :   6

126 .
Consider the following rules for constructing variable names in C

1. It can have alphabets, digits or underscores but no other special character.
2. The maximum number of characters is 8.
3. The first character may be an alphabet or digit but not underscore.

Which of the above are correct?
A)  1 and 2 only
A)  
B)  1 and 3 only
B)  
C)  2 and 3 only
C)  
D)  None of the above
D)  

Correct Answer :   1 and 2 only

Explaination : First character must be alphabet only.

127 .
A microprocessor uses 3 MHz oscillator. The duration of one T state is
A)  1 μs
B)  3 μs
C)  0.666 μs
D)  0.333 μs

Correct Answer :   0.333 μs

Explanation : Microprocessors

128 .
Assertion (A) : In 8085 WR and RD signals are active high.

Reason (R) : LOW WR means write operation and low RD means read operation.
A)  A is correct R is wrong
A)  
B)  A is wrong R is correct
B)  
C)  Both A and R are correct and R is correct explanation of A
C)  
D)  Both A and R are correct but R is not correct explanation of A
D)  

Correct Answer :   A is wrong R is correct

Explaination :

WR and RD are active low.

129 .
Which of the following is not treated as hexadecimal constant by assembler in 8085?
A)  AFH
B)  5 AFH
C)  64 H
D)  OCFH

Correct Answer :   AFH

130 .
Each cell of static RAM contains
A)  2 MOS transistors
B)  4 MOS transistors
C)  4 MOS transistors and 1 capacitor
D)  4 MOS transistors and 2 capacitors

Correct Answer :   4 MOS transistors

Explanation : Each SRAM cell has 4 MOS transistors.

131 .
Which group of instructions is used to change sequence of operations in a computer program?
A)  Logic group
B)  Branch group
C)  Arithmetic group
D)  Data transfer group

Correct Answer :   Branch group

132 .
If 8085 is required to add two 32 bit numbers, the numbers of addition sequences is
A)  1
B)  2
C)  4
D)  8

Correct Answer :   4

133 .
Incompatibility between memory and I/O device may be due to
A)  format of data transfer
B)  electrical characteristics of the two devices
C)  timing according to which data transfer is to take place
D)  All of the above

Correct Answer :   All of the above

134 .
The length of character constant P . b b . E . b C . is
A)  6
B)  7
C)  9
D)  10

Correct Answer :   10

135 .
ALE stands for______
A)  Address Latch Enable
B)  Address Latch Enter
C)  Accumulator Latch Enter
D)  Accumulator Latch Enable

Correct Answer :   Address Latch Enable

136 .
The standard FORTRAN exponential form of decimal number 0.0000437 is
A)  4.37 E - 4
B)  4.37 E - 5
C)  43.7 E - 4
D)  43.7 E - 5

Correct Answer :   4.37 E - 5

137 .
In FORTRAN 77 FLOAT (-28) gives the value
A)  28
B)  -28
C)  -28.0
D)  None of the above

Correct Answer :   -28.0

138 .
A colour monitor usign 16 bits at a resolution of 600 x 400 pixels needs a memory of
A)  6400 B
B)  9600 B
C)  240000 B
D)  480000 B

Correct Answer :   480000 B

139 .
Which of the following is a register-indirect addressing mode instruction set?
A)  DAA
B)  LDAX B
C)  ADI 36H
D)  LDA 2700H

Correct Answer :   LDAX B

Explanation : LDA 2700H is a direct addressing mode instruction. ADI 36H is an immediate addressing mode instruction. DAA is an implicit addressing mode and LDAX B is a register-indirect addressing mode instruction.

140 .
Which is of the following is true about SPHL instruction?
A)  It is a 3-byte instruction
B)  It requires three T-states
C)  It uses indexed addressing mode
D)  Contents of HL pair is moved to SP

Correct Answer :   Contents of HL pair is moved to SP

Explanation : SPHL is a 1-byte instruction. It uses register addressing mode. It required 6 T-states and it means moving the contents of the HL pair to SP.

141 .
The instruction that is used to transfer the data from source operand to destination operand is
A)  data copy/transfer instruction
B)  string instruction
C)  branch instruction
D)  arithmetic/logical instruction

Correct Answer :   data copy/transfer instruction

Explanation : These instructions are used to copy and transfer the instructions.

142 .
Which of the following is not a data copy/transfer instruction?
A)  DAS
B)  POP
C)  MOV
D)  PUSH

Correct Answer :   DAS

Explanation : DAS (Decimal Adjust after Subtraction) is an arithmetic instruction.

143 .
In PUSH instruction, after each execution of the instruction, the stack pointer is
A)  incremented by 1
B)  decremented by 1
C)  decremented by 2
D)  incremented by 2

Correct Answer :   decremented by 2

Explanation : The actual current stack-top is always occupied by the previously pushed data. So, the push operation decrements SP by 2 and then stores the two bytes contents of the operand onto the stack.

144 .
While CPU is executing a program, an interrupt exists then it
A)  stops executing the program
B)  jumps to instruction in other registers
C)  follows the next instruction in the program
D)  breaks the normal sequence of execution of instructions

Correct Answer :   breaks the normal sequence of execution of instructions

Explanation : An interrupt function is to break the sequence of operation.

145 .
An interrupt breaks the execution of instructions and diverts its execution to
A)  control unit
B)  Interrupt service routine
C)  Execution unit
D)  Counter word register

Correct Answer :   Interrupt service routine

Explanation : An interrupt transfers the control to interrupt service routine (ISR). After executing ISR, the control is transferred back again to the main program.

146 .
While executing the main program, if two or more interrupts occur, then the sequence of appearance of interrupts is called
A)  multi-interrupt
B)  nested interrupt
C)  interrupt within interrupt
D)  nested interrupt and interrupt within interrupt

Correct Answer :   nested interrupt and interrupt within interrupt

Explanation : If an interrupt occurs while executing a program, and the processor is executing the interrupt, if one more interrupt occurs again, then it is called a nested interrupt.

147 .
The semiconductor memories are organised as __________ dimension(s) of array of memory locations.
A)  one dimensional
B)  two dimensional
C)  three dimensional
D)  None of the above

Correct Answer :   two dimensional

Explanation : The semiconductor memories are organised as two dimensions of an array which consists of rows and columns.

148 .
If a location is selected, then all the bits in it are accessible using a group of conductors called
A)  data bus
B)  control bus
C)  address bus
D)  either address bus or data bus

Correct Answer :   data bus

Explanation : The bits in a selected location are accessible using data bus.

149 .
To address a memory location out of N memory locations, the number of address lines required is
A)  log N (to the base 2)
B)  log N (to the base e)
C)  log N (to the base 10)
D)  log (2N) (to the base e)

Correct Answer :   log N (to the base 2)

Explanation : For n memory locations, log n(to the base of 2) address lines are required. For addressing 4K bytes of memory, 12 address lines are required since log(4KB) =log(4*1024)=log(212)=12

150 .
If the microprocessor has 10 address lines, then the number of memory locations it is able to address is
A)  512
B)  1024
C)  2048
D)  None of the above

Correct Answer :   1024

Explanation : Since for n address lines, the number of memory locations able to address is 2^n.

151 .
In static memory, the upper 8-bit bank of an available 16-bit memory chip is called
A)  static upper memory
B)  even address memory bank
C)  odd address memory bank
D)  upper address memory bank

Correct Answer :   odd address memory bank

Explanation : In static memory, the upper 8-bit bank is called odd address memory bank.

152 .
The device that enables the microprocessor to read data from the external devices is
A)  reader
B)  display
C)  printer
D)  joystick

Correct Answer :   joystick

Explanation : Since joystick is an input device, it reads data from the external devices.

153 .
The input and output operations are respectively similar to the operations,
A)  read, read
B)  write, write
C)  read, write
D)  write, read

Correct Answer :   read, write

Explanation : The input activity is similar to read operation and the output activity is similar to write operation.

154 .
The operation, IOWR (active low) performs
A)  write operation on output data
B)  read operation on input data
C)  write operation on input data
D)  read operation on output data

Correct Answer :   write operation on output data

Explanation : IOWR (active low) operation means writing data to an output device and not an input device.

155 .
Programmable peripheral input-output port is another name for
A)  serial input port
B)  parallel output port
C)  serial input-output port
D)  parallel input-output port

Correct Answer :   parallel input-output port

Explanation : The parallel input-output port chip 8255 is also known as programmable peripheral input-output port.

156 .
Port C of 8255 can function independently as
A)  input port
B)  output port
C)  either input or output ports
D)  both input and output ports

Correct Answer :   either input or output ports

Explanation : Port C can function independently either as input or as output ports.

157 .
All the functions of the ports of 8255 are achieved by programming the bits of an internal register called
A)  data bus control
B)  control word register
C)  read logic control
D)  None of the above

Correct Answer :   control word register

Explanation : By programming the bits of control word register, the operations of the ports are specified.

158 .
The input provided by the microprocessor to the read/write control logic is
A)  A1
B)  RESET
C)  WR(ACTIVE LOW)
D)  All of the above

Correct Answer :   All of the above

Explanation : RD(ACTIVE LOW), WR(ACTIVE LOW), A1, A0, RESET are the inputs provided by the microprocessor to the read/write control logic of 8255.

159 .
The time taken by the ADC from the active edge of SOC(start of conversion) pulse till the active edge of EOC(end of conversion) signal is called
A)  edge time
B)  conversion delay
C)  time delay
D)  conversion time

Correct Answer :   conversion delay

Explanation : Broadly speaking, the time taken by the converter to calculate the equivalent digital data output from the moment of the start of conversion is called conversion delay.

160 .
The popular technique that is used in the integration of ADC chips is
A)  dual slope integration
B)  successive approximation
C)  successive approximation and dual slope integration
D)  None of the above

Correct Answer :   successive approximation and dual slope integration

Explanation : Successive approximation and dual slope integration are the most popular techniques that are used in the integrated ADC chips.

161 .
The procedure of algorithm for interfacing ADC contain
A)  ensuring stability of analog input
B)  issuing start of conversion pulse to ADC
C)  reading digital data output of ADC as equivalent digital output
D)  All of the above

Correct Answer :   All of the above

Explanation : The general algorithm for interfacing ADC contains ensuring the stability of analog input, issuing start of conversion pulse to ADC, reading end of conversion signal to mark the end of a conversion process, reading digital data output of ADC as equivalent digital output.

162 .
The conversion delay in a successive approximation of an ADC 0808/0809 is
A)  100 microseconds
B)  100 milliseconds
C)  50 milliseconds
D)  None of the above

Correct Answer :   100 microseconds

Explanation : The conversion delay is 100microseconds which is low as compared to other converters.

163 .
In a microprocessor the clock signal
A)  is mostly supplied externally
B)  is always supplied externally
C)  is always generated internally
D)  may be generated internally or supplied externally

Correct Answer :   may be generated internally or supplied externally

164 .
If x = 0.1396 radians, the values of 1 - cos x and 2 sin2 (x / 2) using floating point arithmetic with a 4 digit mantissa are respectively
A)  .1000 E - 1 each
A)  
B)  .1000 E - 1 and .9727 E - 2 respectively
B)  
C)  .9727 E - 2 each
C)  
D)  .9727 E - 2 and .1000 E - 1 respectively
D)  

Correct Answer :   .1000 E - 1 and .9727 E - 2 respectively

165 .
The number of select lines in ALU 1C 74181 is
A)  2
B)  4
C)  8
D)  16

Correct Answer :   4

166 .
Which data transfer scheme is used when large block of data is to be transferred in a computer?
A)  DMA
B)  Programmed data transfer
C)  Either (A) or (B)
D)  Neither (A) nor (B)

Correct Answer :   DMA

167 .
The instruction LDA 20 in 8085 means
A)  the value 20 is fetched into accumulator
B)  contents of memory location 20 are fetched into the accumulator
C)  Either (A) or (B)
D)  Neither (A) nor (B)

Correct Answer :   contents of memory location 20 are fetched into the accumulator

168 .
The proper exponential form of - 0.0032 in FORTRAN 77 is
A)  -0.0032
B)  -0.032 E - 1
C)  -0.00032 EI
D)  -3.2 E - 3

Correct Answer :   -3.2 E - 3

169 .
Which of the following integer expressions is correct in Pascal?
A)  A - 4.0
B)  A / B + D
C)  - A + B + M
D)  A div B * mod C

Correct Answer :   - A + B + M

170 .
An advantage of memory interlacing is that
A)  cost of memory is reduced
B)  a larger memory is obtained
C)  a non-volatile memory is obtained
D)  effective speed of memory is increased

Correct Answer :   effective speed of memory is increased

171 .
The signals in 8086 are classified into
A)  minimum mode and maximum mode
B)  low mode and high mode
C)  decrement mode and increment mode
D)  None of the above

Correct Answer :   minimum mode and maximum mode

172 .
Internally the two distinct units of 8086 are called
A)  master unit and slave unit
B)  bus interface unit and execution unit
C)  command unit and follow unit
D)  memory unit and operation unit

Correct Answer :   bus interface unit and execution unit

173 .
Which of the following directives in 8085 causes one byte to be reserved in the memory?
A)  D S
B)  E Q U
C)  D B
D)  D W

Correct Answer :   E Q U

174 .
The chip 8259 is a_____
A)  I/O device
B)  memory chip
C)  programmable interrupt controller
D)  programmable peripheral interface

Correct Answer :   programmable interrupt controller

175 .
Which one is true for writing array variable in Pascal?
A)  The subscripts must be enclosed within parenthesis
B)  The subscripts in array variable must be separated by dots
C)  The general form of an array variable must be an integer name followed by subscripts enclosed within square brackets. The subscripts are separated by commas
D)  The general form of an array variable is an integer or a real variable name followed by subscripts enclosed within square brackets. The subscripts are separated by commas

Correct Answer :   The general form of an array variable is an integer or a real variable name followed by subscripts enclosed within square brackets. The subscripts are separated by commas

176 .
What does the instruction 'PCHL' in 8085 do?
A)  Double the contents of register pair H L
B)  Shift the contents of register pair H L by one bit to left
C)  Shift the contents of register pair H L by one bit to the right
D)  Load the program counter with contents of register pair H L

Correct Answer :   Load the program counter with contents of register pair H L

177 .
In a multi-processor configuration two coprocessors are connected to host 8086 processor. The instruction sets of the two coprocessors
A)  must be the same as that of host
B)  may overlap
C)  must be same
D)  must be disjoint

Correct Answer :   must be the same as that of host

178 .
For a 16 bit computer the range of integer constants in C is
A)  -32767 to + 32768
B)  -32768 to + 32767
C)  -65536 to + 65535
D)  -65535 to + 65536

Correct Answer :   -32768 to + 32767

179 .
In which group of 8085 instructions condition flags are not affected?
A)  Logical group
B)  Arithmetic group
C)  Data transfer group
D)  Both (A) and (B)

Correct Answer :   Data transfer group

180 .
In 8085, the instruction CMA is an example of
A)  Implict addressing
B)  Direct addressing
C)  Register addressing
D)  Immediate addressing

Correct Answer :   Implict addressing

181 .
In 8085 the time required to add two 32 bit numbers is (if clock frequency is 5 MHz)
A)  about 1 ns
B)  about 1 μs
C)  about 30 μs
D)  about 100 μs

Correct Answer :   about 30 μs

182 .
DMA stands for_________
A)  Decimal Machine Address
B)  Direct Memory Address
C)  Direct Memory Accumulator
D)  Distributed Memory Address

Correct Answer :   Direct Memory Address

183 .
RESET OUT signal when high indicates that
A)  program counter etc. are being set
B)  program counter etc. are being reset
C)  Either (A) or (B)
D)  None of the above

Correct Answer :   program counter etc. are being reset

184 .
If X = 2.5 and Y = 2.5, which of the following expressions would give the result as 5/7?
A)  X + 2.5 / Y + 3.0
B)  (X + 2.5) / Y + 3.5
C)  (X + 2.5) / Y + 4.5
D)  (X + 2.5) / (Y + 4.5)

Correct Answer :   (X + 2.5) / (Y + 4.5)

185 .
Which of the following is not a classification of programmed data transfer?
A)  Hand shaking
B)  Direct transfer
C)  Synchronous transfer
D)  Interrupt driver transfer

Correct Answer :   Direct transfer

186 .
Which of the following identifiers is valid in Pascal?
A)  THETA
B)  1 ST
C)  NUM
D)  $ BETA

Correct Answer :   THETA

187 .
Assertion (A) : Microprocessor 8085 has 16 address bus lines and 8 data bus lines.

Reason (R) : Address bus in 8085 is unidirectional.
A)  A is wrong R is correct
A)  
B)  A is correct R is wrong
B)  
C)  Both A and R are correct and R is correct explanation of A
C)  
D)  Both A and R are correct but R is not correct explanation of A
D)  

Correct Answer :   Both A and R are correct but R is not correct explanation of A

188 .
If the absolute value of a number is less than decimal 1, the sign of exponent in floating point representation is
A)  zero
B)  positive
C)  negative
D)  zero or negative

Correct Answer :   zero or negative

189 .
Which of the following is not a library string function in C?
A)  strlen
B)  strcpy
C)  strbig
D)  strdup

Correct Answer :   strbig

190 .
An instruction using immediate addressing mode in 8085 is
A)  2 bytes long
B)  3 bytes long
C)  2 or 3 bytes long
D)  1 or 2 or 3 bytes long

Correct Answer :   1 or 2 or 3 bytes long

191 .
Consider the directive T : DS105. This directive
A)  directs the assembler to reserve a sequence of 105 bits in the memory
B)  directs the assembler to reserve a sequence of 105 bytes in the memory
C)  directs the assembler to reserve a sequence of consecutive 105 bytes in the memory
D)  directs the assembler to reserve a sequence of consecutive 105 bits in the memory

Correct Answer :   directs the assembler to reserve a sequence of consecutive 105 bytes in the memory

192 .
As compared to operating current, the current drawn by a memory chip in stand by mode is
A)  about 1 / 64
B)  about one-eighth
C)  about 1 / 500
D)  about the same

Correct Answer :   about one-eighth

193 .
Which characteristic of a memory chip is called ac characteristics?
A)  Bus loading
B)  Timing characteristic
C)  Power consumption
D)  All of the above

Correct Answer :   Timing characteristic

194 .
Which of the following alphanumeric characters is not allowed in Basic?
A)  digits 0 to 9
B)  capital letters A to Z
C)  lower case letters a to z
D)  special characters +, -, *, / etc

Correct Answer :   special characters +, -, *, / etc

195 .
In 8085 which addressing mode is also called inherent addressing?
A)  Implicit
B)  Direct
C)  Register
D)  Immediate

Correct Answer :   Implicit

196 .
In Java which operator can be used even if there is a single operand
A)   +
B)   -
C)   *
D)   /

Correct Answer :   -

197 .
In a typical microcomputer data transfer takes place between
A)  μP and memory
B)  μP and I/O devices
C)  memory and I/O devices
D)  All of the above

Correct Answer :   All of the above

198 .
In 8085 the pins for + 5 V input and ground are
A)  1 and 1 respectively
B)  1 and 2 respectively
C)  40 and 20 respectively
D)  20 and 40 respectively

Correct Answer :   40 and 20 respectively

199 .
The normalised form of 1.81 x 10-11 is
A)  18.1 x 10⁻¹³
A)  
B)  18.1 x 10⁻¹²
B)  
C)  0.181 x 10⁻¹⁰
C)  
D)  0.0181 x 10⁻⁹
D)  

Correct Answer :   0.181 x 10⁻¹⁰

200 .
'Burst refresh' in DRAM is also called
A)  Hidden refresh
B)  Distributed refresh
C)  Both (A) and (B)
D)  Concentrated refresh

Correct Answer :   Concentrated refresh

201 .
If CS = A15 A14 A13 is used as chip select logic of a 4 K RAM in 8085 system, its memory range is
A)  3000 H - 3 FFF H
A)  
B)  7000 H - 7 FFFH
B)  
C)  6000 H - 6 FFF H and 7000 H - 7 FFF H
C)  
D)  5000 H - 5 FFF H and 6000 H - 6 FFF H
D)  

Correct Answer :   6000 H - 6 FFF H and 7000 H - 7 FFF H

202 .
Consider the following part of a C program float a, b

b = (a > 4 ? 2 : 9);

Assuming that a has values of 3 and 6, the values stored respectively will be
A)  2 and 9
A)  
B)  2.0 and 2.0
B)  
C)  2.0 and 9.0
C)  
D)  9.0 and 2.0
D)  

Correct Answer :   9.0 and 2.0

203 .
An I/O processor controls the flow of information between
A)  main memory and I/O devices
B)  two I/O devices
C)  cache and main memory
D)  cache memory and I/O devices

Correct Answer :   main memory and I/O devices

204 .
When two ALU 1C 74181 are cascaded
A)  the carry in of first stage connected to carry in of second stage
B)  the carry out of first stage is connected to carry in of second stage
C)  the carry in of first stage is connected to carry out of second stage
D)  the carry out of first stage is connected to carry out of second stage

Correct Answer :   the carry out of first stage is connected to carry in of second stage

Explanation : In cascading carry out of first stage is connected to carry in of second stage.

205 .
Consider the following statements about expressing real constants in exponential form in C

1. The mantissa and exponent are separated either by e or E.
2. The mantissa and exponent may have positive or negative sign.
3. Default sign of mantissa is positive.
4. Default sign of exponent is negative.

Which of the above statements are wrong?
A)  1 only
A)  
B)  1 and 4 only
B)  
C)  1, 3 and 4 only
C)  
D)  4 only
D)  

Correct Answer :   1 and 4 only

Explaination : E is not allowed and default sign of exponent is positive.

206 .
If F = 95.0 what will be the result of following FORTRAN 77 program?

REAL F , C
READ * , F
C = (5. / 9.) * (F - 32.)
A)  35
A)  
B)  35.0
B)  
C)  25
C)  
D)  25.0
D)  

Correct Answer :   35.0

Explaination : Microprocessors

207 .
Consider the following program in Basic

10 READ X, Y, Z
15 DATA 20, 30, 10
20 S = X + Y + Z
30 A = S/3
35 PRINT S, A, X, Y, Z
40 END

The output will be
A)  60, 20, 20, 30, 10
A)  
B)  10, 30, 20, 20, 60
B)  
C)  60, 20, 30, 10, 20
C)  
D)  60, 30, 10, 20, 20
D)  

Correct Answer :   60, 20, 20, 30, 10

Explaination : Microprocessors

208 .
Assuming that k is an integer what would the result of following expression in C
k = 2* 3 / 5 + 4 / 4 + 8 - 2 - 4 / 8
A)  7
A)  
B)  7.5
B)  
C)  8
C)  
D)  zero
D)  

Correct Answer :   8

Explaination : k = 1 + 1 + 8 - 2 - 0 = 8 because k is an integer.

209 .
Which of the following is a valid real constant?
A)  KM
B)  1281
C)  1281.0
D)  None of the above

Correct Answer :   1281.0

Explanation : It is the only one with decimal point.

210 .
The decimal equivalent of binary 1101.11 is
A)  9.75
B)  11.50
C)  11.75
D)  13.75

Correct Answer :   13.75

Explanation : Convert to decimal.

211 .
Zip floppy has a capacity of______
A)  25 MB
B)  50 MB
C)  500 MB
D)  100 MB or 250 MB

Correct Answer :   100 MB or 250 MB

Explanation : Zip floppy has high memory 100 MB or 250 MB.

212 .
Consider the following program in Basic

5 READ R
10 D = 2 * R
20 A = 3.1416 * D * D / 4
30 PRINT A

Assuming that R = 3.0, the output A =
A)  2.827
A)  
B)  28.27
B)  
C)  282.7
C)  
D)  2827
D)  

Correct Answer :   28.27

Explaination : Microprocessors

213 .
A microprocessor is generally_________
A)  single chip LSI
B)  single chip SSI
C)  single chip MSI
D)  All of the above

Correct Answer :   single chip LSI

Explanation : It is LSI chip.

214 .
A computer program is used to read N and print the sum 12 + 22 + 32 +.....+ N2. If N = 10, the print out will show the number
A)  10
A)  
B)  100
B)  
C)  285
C)  
D)  385
D)  

Correct Answer :   385

Explaination :

SUM = 12 + 22 + 33 + 44 + 52 + 62 + 77 + 82 + 92 + 102 = 385.

215 .
Which of the following array names is invalid in Fortran 77?
A)  B(2, 4)
B)  B(M, R)
C)  B(3, 6)
D)  B(M, 3)

Correct Answer :   B(M, R)

Explanation : Subscript not proper.

216 .
Consider the expression b = acd (xz). The correct C statement for above expression is
A)  a c d (x * z)
B)  a* c* d* (x z)
C)  a * c * d (x * z)
D)  None of the above

Correct Answer :   a * c * d (x * z)

217 .
Which is a valid Java variable?
A)  1 a b
B)  56 a
C)  a 56
D)  5 a 6

Correct Answer :   a 56

Explanation : In all others first letter is not lower case.

218 .
When we use RRC instruction once in 8085, the number is
A)  divided by 2
B)  divided by 4
C)  multiplied by 2
D)  multiplied by 4

Correct Answer :   divided by 2

Explanation : When RRC is used once the number is divided by 2.

219 .
In a RAM chip with a total of 8096 words, the word addresses range from
A)  1 to 8095
B)  0 to 8095
C)  1 to 8096
D)  0 to 8096

Correct Answer :   0 to 8095

Explanation : The starting word address is 0.

220 .
Which of the following is not a valid arithmetic statement in C?
A)  x = x + 1
B)  x = y * z
C)  z = y / x
D)  x * y = z

Correct Answer :   x * y = z

Explanation : Left hand side must be a variable name.

221 .
Consider the following expressions in Java
int a, b, c,
a = 40;
b = a++ ;
c = ++a ;
Now the values of a, b, c are
A)  40, 42, 42 respectively
A)  
B)  40, 40, 42 respectively
B)  
C)  42, 40, 42 respectively
C)  
D)  42, 42, 42 respectively
D)  

Correct Answer :   42, 40, 42 respectively

Explaination : The steps are : a is given the value 40, b is given the value of a before it is incremented (i.e., 40) and a is incremented to 41, a is incremented to 42 and c is given this value. Thus the result is 42, 40, 42.

222 .
Which of the following integer expressions is incorrect in Pascal?
A)  A * * B
B)  A mod B
C)  A div B - C
D)  L div M + P

Correct Answer :   A * * B

Explanation : Two operators cannot be together.

223 .
If it is desired to tabulate number of students in a class in Fortran language, a proper variable name is
A)  ST
B)  STD
C)  STUD
D)  NSTUD

Correct Answer :   NSTUD

Explanation : It is an integer. Hence N as first character.

224 .
In Pascal if I = 45, I div 10 * 10 =
A)  0.4
B)  0.45
C)  40
D)  45

Correct Answer :   40

Explanation : 45/10 = 4.5 → 4 x 10 = 40.

225 .
The number of logic or arithmetic operations with ALU 1C 74181 can carry out is
A)  32
B)  16
C)  8
D)  4

Correct Answer :   16

226 .
In FORTRAN 77 IFIX (-73.2) gives the value
A)  -7
B)  -73.2
C)  73
D)  -73

Correct Answer :   -73

227 .
The instruction MVI A, 20 in 8085 means
A)  the value 20 is brought into accumulator
B)  contents of memory location 20 are brought into the accumulator
C)  Either (A) or (B)
D)  Neither (A) nor (B)

Correct Answer :   the value 20 is brought into accumulator

228 .
The two orientations of worksheet page are called
A)  font and footer
B)  portrait and landscape
C)  header and footer
D)  auto text and auto correct

Correct Answer :   portrait and landscape

Explanation : Portrait and worksheet are two orientations of worksheet page.

229 .
The correct form of expression B3 -2 A C in FORTRAN 77 is
A)  B * 3 - 2 * A AC
A)  
B)  B * * 3 - 2 * A * C
B)  
C)  B *** 3 - 2 * A * C
C)  
D)  B * * 3 - 2 ** A * C
D)  

Correct Answer :   B * * 3 - 2 * A * C

Explaination : It is the only expression with correct symbols for exponential and product.

230 .
Which one is not a valid subscripted variable?
A)  A (2 I)
B)  VEL(I)
C)  MET(J + 2, K - 4)
D)  KET(2* J, 3* 1 - 4)

Correct Answer :   A (2 I)

231 .
Consider the following statement in FORTRAN 77

READ*, [X(I) Y(I) = 0, 3, 2]

Which of the following is correct?
A)  2 values could be read and stored asX (0), Y (0)
A)  
B)  4 values could be read and stored asX (0), Y (0), X (2), Y (2)
B)  
C)  6 values could be read and stored as X (0), Y (0), Y (2), X (3), Y (3)
C)  
D)  None of the above
D)  

Correct Answer :   4 values could be read and stored asX (0), Y (0), X (2), Y (2)

232 .
Assertion (A) : If contents of F register in 8085 are 01010001, it means S = 0, Z = 1, AC= 1, P = 0 and CY = 1.

Reason (R) : When an instruction is called from memory, the op. code of instruction is stored in instruction register.
A)  A is wrong R is correct
A)  
B)  A is correct R is wrong
B)  
C)  Both A and R are correct and R is correct explanation of A
C)  
D)  Both A and R are correct but R is not correct explanation of A
D)  

Correct Answer :   Both A and R are correct but R is not correct explanation of A

233 .
An instruction used to set cany flag in a computer is classified as
A)  logical
B)  arithmetic
C)  data transfer
D)  program control

Correct Answer :   arithmetic

234 .
In FORTRAN 77 the total number of characters in a variable can be a maximum of
A)  9
B)  8
C)  6
D)  1

Correct Answer :   6

235 .
In 8086 the instruction ADD AL, CH means
A)  the two 8 bit values in registers AL and CH are added and result placed in register CH
B)  the two 16 bit values in registers AL and CH are added and result placed in register AL
C)  the two 8 bit values in registers AL and CH are added and result placed in register AL
D)  the two 16 bit values in registers AL and CH are added and result placed in register CH

Correct Answer :   the two 8 bit values in registers AL and CH are added and result placed in register AL

236 .
In which of the following 8085 instructions is the CY flag complemented?
A)  STC
B)  RRC
C)  CMA
D)  CMC

Correct Answer :   CMC

237 .
A memory system has a 9 chips. If MTBF of one clip is 900 000 hours, MTBF of complete memory system is
A)  100000 hours
B)  8100000 hours
C)  1800000 hours
D)  None of the above

Correct Answer :   100000 hours

238 .
If X = - 285.56 and the Pascal write statement used is WRITE (X : 8). Then the print out will appear as
A)  -285.560
B)  -2.8 E + 02
C)  -2.85 E + 02
D)  -2.85560 E + 02

Correct Answer :   -2.8 E + 02

239 .
For the Infix expression A + B - C + D the Postfix notation is
A)  AB - C + D
B)  AB + C - D +
C)  + AB - C + D
D)  None of the above

Correct Answer :   AB + C - D +

240 .
Which of the following is also called handshaking programmed data transfer?
A)  Synchronous transfer
B)  Interrupt driver transfer
C)  Asynchronous transfer
D)  None of the above

Correct Answer :   Asynchronous transfer

241 .
The operations which occur most frequently in a computer are
A)  fetch
B)  execute
C)  Both (A) and (B)
D)  None of the above

Correct Answer :   Both (A) and (B)

242 .
If the resolution of a printer is 1200 dpi, the number of dots per square inch is
A)  800
B)  1200
C)  1200 x 1200
D)  None of the above

Correct Answer :   1200 x 1200

243 .
Which of these are 16 bit microprocessors?
A)  Z8000
B)  80286
C)  MC68000
D)  All of the above

Correct Answer :   All of the above

244 .
In which of the following 8085 instructions are all condition flags except CY affected?
A)  INR r
B)  ADC r
C)  SEE M
D)  ACI data

Correct Answer :   INR r

245 .
Programs like compilers, assemblers etc. are stored in a mircocomputer in
A)  registers
B)  mass storage
C)  cache memory
D)  primary memory

Correct Answer :   registers

246 .
The number of registers and flags in 8086 are
A)  9 and 9 respectively
B)  9 and 5 respectively
C)  13 and 9 respectively
D)  13 and 5 respectively

Correct Answer :   13 and 9 respectively

247 .
ALU 1C 74181 can accept two words each having
A)  2 bits
B)  4 bits
C)  8 bits
D)  16 bits

Correct Answer :   4 bits

248 .
Which of the following is not a legal subscript?
A)  -3
B)  J + 2
C)  JA - 4
D)  3* IA - 2

Correct Answer :   -3

249 .
The instruction MOV M, r in 8085
A)  causes the content of memory location whose address is in register H, L to move to register r and uses immediate addressing mode
A)  
B)  causes the content of register r to be moved to memory location whose address is in register H, L and uses immediate addressing mode
B)  
C)  causes the content of memory location whose address is in register H, L to move to register r and uses register indirect addressing mode
C)  
D)  causes content of register r to be moved to memory location whose address is in register H, L and uses register indirect addressing mode
D)  

Correct Answer :   causes content of register r to be moved to memory location whose address is in register H, L and uses register indirect addressing mode

250 .
Which of the following characters is allowed in variable names in C?
A)  dot
B)  blank
C)  comma
D)  underscore

Correct Answer :   underscore

251 .
The standard FORTRAN exponential form of decimal number - 0.000000023 is
A)  2.3 E - 7
B)  -2.3 E - 7
C)  2.3 E - 8
D)  -2.3 E - 8

Correct Answer :   -2.3 E - 8

252 .
Consider the following program for 8085

MOV A, D
RAL
MOV D, A

If initial contents of register D is decimal number 20, the final content of register D is
A)  decimal 10
A)  
B)  decimal 20
B)  
C)  decimal 40
C)  
D)  None of the above
D)  

Correct Answer :   decimal 40

253 .
A string constant in basic is
A)  a string of capital alphabets A to Z, included in question mark
B)  a string of capital alphabets A to Z, digits 0 to 9 and special characters
C)  a string of capital alphabets A to Z, digits 0 to 9 and special characters included in question mark
D)  a string of capital alphabets A to Z and digits 0 to 9 included in question mark

Correct Answer :   a string of capital alphabets A to Z, digits 0 to 9 and special characters included in question mark

254 .
In microprocessor 8088
A)  16 data bits are multiplexed with 16 bits of address bus
B)  8 data bits are multiplexed with 8 least significant bits of address bus
C)  8 data bits are multiplexed with 8 most significant bits of address bus
D)  None of the above

Correct Answer :   8 data bits are multiplexed with 8 least significant bits of address bus

255 .
Which of the following instructions in 8085 does not belong to data transfer group?
A)  ADC M
B)  MOV M, r
C)  MVIM, data
D)  L X I rp, data 16

Correct Answer :   ADC M

256 .
Which of the following buses does not exist in 8085?
A)  Data bus
B)  Control bus
C)  Address bus
D)  Exchange bus

Correct Answer :   Exchange bus

257 .
The sign of a floating point number depends on
A)  only the sign of exponent
B)  only the sign of mantissa
C)  the sign of both mantissa and exponent
D)  Either (A) or (B)

Correct Answer :   only the sign of mantissa

258 .
Which of the following produces very wide drifts in clock frequency?
A)  Crystal
B)  RC circuit
C)  LC resonant circuit
D)  Crystal and RC circuit

Correct Answer :   RC circuit

259 .
For decimal numbe'r 13.5, the floating point representation in 4 byte excess 128 code is
A)  00000000 01101100 10000100 00000000
B)  00000000 01101100 00000000 10000100
C)  01101100 00000000 00000000 10000100
D)  01101100 00000000 10000100 00000000

Correct Answer :   01101100 00000000 00000000 10000100

260 .
The register set and instruction set of 8088 is similar to that of
A)  8085
B)  8086
C)  partly 8085 and partly 8086
D)  None of the above

Correct Answer :   8086

261 .
The storage capacity of DSDD disk and DSHD disk are
A)  360 KB each
B)  1.2 MB each
C)  1.2 MB and 360 KB respectively
D)  360 KB and 1.2 MB respectively

Correct Answer :   360 KB and 1.2 MB respectively

262 .
Which of the following is also called Non volatile RAM?
A)  EEPROM
B)  UVEPROM
C)  Shadow RAM
D)  None of the above

Correct Answer :   Shadow RAM

263 .
Which of the following is invalid in Basic?
A)  A ** B - C
B)  5.2 ** 4.3
C)  5.2 ** (- 4.3)
D)  (- 5.2) ** (4.3)

Correct Answer :   (- 5.2) ** (4.3)

264 .
In EPROM integrated dose is defined as
A)  UV light intensity x exposure time in seconds
B)  UV light intensity / exposure time in seconds
C)  exposure time in seconds / UV light intensity
D)  None of the above

Correct Answer :   UV light intensity x exposure time in seconds

265 .
In 8086 a word OA 50 FH is stored in 02 and 03 memory locations. Then
A)  OFH is stored at location 03 and 0 A 5 at location 02 and address of word in 02
B)  OFH is stored at location 02 and 0 A 5 at location 03 and address of word is 02
C)  OFH is stored at location 03 and 0 A 5 at location 02 and address of word is 03
D)  OFH is stored at location 02 and 0 A 5 at location 03 and address of word is 03

Correct Answer :   OFH is stored at location 02 and 0 A 5 at location 03 and address of word is 02

266 .
In the words Kb or Mb used describing memory capacity, the letter b denotes
A)  bits
B)  bytes
C)  bubbles
D)  bits or bytes depending on type of memory

Correct Answer :   bits

267 .
In the expression a = 5 * 2 / 3.2 + 4 / 8 - 2 + 5 / 9 which operation will have the first priority in C?
A)  2 / 3.2
B)  4 / 8
C)  5*2
D)  5 * 2 / 3.2

Correct Answer :   5*2

268 .
In Pascal the repeat and while loops will terminate
A)  only when the logical expression controlling the loop becomes true for both repeat and while loops
B)  only when the logical expression controlling the loop becomes false for both repeat and while loops
C)  only when the logical expression controlling the loop becomes false for repeat loop and true for while loop
D)  only when the logical expression controlling the loop becomes true for repeat loop and false for while loop

Correct Answer :   only when the logical expression controlling the loop becomes true for repeat loop and false for while loop

269 .
Which of the following statements is non-executable in FORTRAN 77?
A)  DO
B)  END
C)  ASSIGN
D)  DIMENSION

Correct Answer :   DIMENSION

270 .
In C the range of real constants expressed in exponential form is
A)  -2.3 e 37 to + 2.3 e 37
B)  -3.4 e 37 to + 3.4 e 37
C)  -2.3 e 38 to + 2.3 e 38
D)  -3.4 e 38 to + 3.4 e 38

Correct Answer :   -3.4 e 37 to + 3.4 e 37

271 .
The statement IMPLICIT INTEGER (A - F) in FORTRAN identifies
A)  all variable names which begin with A, B, C, D, E or F as being of integer type
A)  
B)  all variable names which begin with A and have 6 characters
B)  
C)  all character names which begin with A, B, C, D, E, or F as being of integer type
C)  
D)  None of the above
D)  

Correct Answer :   all variable names which begin with A, B, C, D, E or F as being of integer type

272 .
An 8 bit wide 4 word sequential memory has
A)  Four 4 bit shift registers
B)  Four 8 bit shift registers
C)  Eight 4 bit shift registers
D)  Eight 8 bit shift registers

Correct Answer :   Eight 4 bit shift registers

273 .
In POP instruction, after each execution of the instruction, the stack pointer is
A)  incremented by 2
B)  decremented by 2
C)  incremented by 1
D)  decremented by 1

Correct Answer :   incremented by 2

Explanation : The actual current stack top is poped into the specific operand as the contents of stack top memory is stored in AL&SP and further contents of the memory location pointed to by SP are copied to AH & SP.

274 .
The instructions that are used for reading an input port and writing an output port respectively are
A)  IN, MOV
B)  IN, OUT
C)  MOV, IN
D)  MOV, XCHG

Correct Answer :   IN, OUT

Explanation : The address of the input/output port may be specified directly or indirectly.
Example for input port: IN AX, DX; This instruction reads data from a 16-bit port whose address is in DX and stores it in AX
Example for output port: OUT 03H, AL; This sends data available in AL to a port whose address is 03H.

275 .
Whenever a number of devices interrupt a CPU at a time, and if the processor is able to handle them properly, it is said to have
A)  interrupt handling ability
B)  interrupt processing ability
C)  multiple interrupt executing ability
D)  multiple interrupt processing ability

Correct Answer :   multiple interrupt processing ability

Explanation : The processor if handles more devices as interrupts then it has multiple interrupt processing ability.

276 .
NMI stands for
A)  nonmaskable interrupt
B)  nonmultiple interrupt
C)  nonmovable interrupt
D)  None of the above

Correct Answer :   nonmaskable interrupt

Explanation : NMI is the acronym for nonmaskable interrupt.

277 .
The Programmable interrupt controller is required to
A)  handle no interrupt request
B)  handle one interrupt request
C)  handle one or more interrupt requests at a time
D)  handle one or more interrupt requests with a delay

Correct Answer :   handle one or more interrupt requests at a time

Explanation : If more than one interrupt request (INTR) occurs at a time, then an external chip called programmable interrupt controller is required to handle them.

278 .
In static memory, the lower 8-bit bank of an available 16-bit memory chip is called
A)  static lower memory bank
B)  odd address memory bank
C)  even address memory bank
D)  lower address memory bank

Correct Answer :   even address memory bank

Explanation : In static memory, the lower 8-bit bank is called even address memory bank.

279 .
If (address line) Ao=0 then, the status of address and memory are
A)  address is odd and memory is in RAM
B)  address is even and memory is in RAM
C)  address is odd and memory is in ROM
D)  address is even and memory is in ROM

Correct Answer :   address is even and memory is in RAM

Explanation : If Ao=0 then address is even and is in RAM. If Ao=1 then, address is odd and is in RAM.

280 .
If at a time Ao and BHE(active low) both are zero then, the chip(s) selected will be
A)  RAM
B)  ROM
C)  ONLY RAM
D)  RAM and ROM

Correct Answer :   RAM and ROM

Explanation : If at a time Ao and BHE(active low) both are zero, then both RAM and ROM are selected.

281 .
In memory-mapped scheme, the devices are viewed as
A)  memory locations
B)  only input devices
C)  only output devices
D)  distinct I/O devices

Correct Answer :   memory locations

Explanation : In memory-mapped scheme, the devices are viewed as memory locations and are addressed likewise.

282 .
In 74LS245, if DIR is 1, then the direction is from
A)  sink to source
B)  source to sink
C)  inputs to outputs
D)  outputs to inputs

Correct Answer :   inputs to outputs

Explanation : If DIR is 1, then the direction is from A(inputs) to B(outputs).

283 .
While performing read operation, one must take care that much current should not be
A)  sinked from data lines
B)  sourced from data lines
C)  sinked from address lines
D)  sourced or sinked from data lines

Correct Answer :   sourced or sinked from data lines

Explanation : More current should not be sourced or sinked from data lines while reading to avoid loading.

284 .
If A1=0, A0=1 then the input read cycle is performed from
A)  port A to data bus
B)  port B to data bus
C)  port C to data bus
D)  CWR to data bus

Correct Answer :   port B to data bus

Explanation : If A1=0, A0=1 then the input read cycle is performed from port B to data bus.

285 .
The function, 'data bus tristated' is performed when
A)  CS(active low) = 0
B)  CS(active low) = 1
C)  CS(active low) = 0, RD(active low) = 1, WR(active low) = 1
D)  CS(active low) = 1 OR CS(active low) = 0, RD(active low) = 1, WR(active low) = 1

Correct Answer :   CS(active low) = 1 OR CS(active low) = 0, RD(active low) = 1, WR(active low) = 1

Explanation : The data bus is tristated when chip select pin=1 or chip select pin=0 and read and write signals are high i.e 1.

286 .
The pin that clears the control word register of 8255 when enabled is
A)  SET
B)  CLK
C)  RESET
D)  CLEAR

Correct Answer :   RESET

Explanation : If reset pin is enabled then the control word register is cleared.

287 .
ADC 7109 integrated by Dual slope integration technique is used for
A)  low complexity
B)  low cost option
C)  slow practical applications
D)  All of the above

Correct Answer :   All of the above

Explanation : Compared to other 12-bit ADCs, it is of very low cost and useful for slow practical applications.

288 .
In the signal integrate phase, the differential input voltage between IN LO(input low) and IN HI(input high) pins is integrated by the internal integrator for a fixed period of
A)  256 clock cycles
A)  
B)  1024 clock cycles
B)  
C)  2048 clock cycles
C)  
D)  4096 clock cycles
D)  

Correct Answer :   2048 clock cycles

Explaination : The internal integrator needs 2048 clock cycles to integrate voltage difference between input low and input high.

289 .
The 8085 instruction LDA FFA is an example of
A)  Direct addressing
B)  Register addressing
C)  Immediate addressing
D)  Register indirect addressing

Correct Answer :   Direct addressing

290 .
Consider the following statement in Fortran 77

READ *, (X.(I), I = 0, 4)

Which of the following is correct?
A)  3 values would be read and stored in X (0), X (1), X (2)
A)  
B)  4 values would be read and stored in X (0), X (1), X (2), X (3)
B)  
C)  5 values would be read and stored in X (0), X (1), X (2), (3)(4)
C)  
D)  5 values would be read and stored in X (I), X (2), X (3), X (4), X (5)
D)  

Correct Answer :   5 values would be read and stored in X (0), X (1), X (2), (3)(4)

291 .
Which of the following methods does not cause any reduction in instruction length?
A)  Using program counter
B)  Machine language programming
C)  Implicit source and destination address
D)  Common source and destination address

Correct Answer :   Machine language programming

292 .
If the mantissa has a sign bit of 0 and the exponent is changed from a negative number to a more positive number the result is
A)  a negative number
B)  a positive number and closer to zero
C)  a negative number and closer to zero
D)  a positive number and away from zero

Correct Answer :   a positive number and closer to zero

293 .
Which of the following statements in FORTRAN 77 is non executable?
A)  STOP
B)  GO TO
C)  PARAMETER
D)  None of the above

Correct Answer :   PARAMETER

294 .
The initial contents of ACC and CY in 8085 are

    CY = 1ACC = 10000001

After instruction RAL is executed once the contents of CY and ACC respectively will be
A)  1 and 00000011
A)  
B)  0 and 00000011
B)  
C)  1 and 00000001
C)  
D)  0 and 00000001
D)  

Correct Answer :   1 and 00000011

295 .
The instruction MOV r1, r2 in 8085
A)  causes contents of registers r1 to be moved to r2 and uses register addressing
A)  
B)  causes contents of registers r1 to be moved to r2 and uses register immediate addressing
B)  
C)  causes contents of registers r2 to be moved to r1 and uses register immediate addressing
C)  
D)  causes contents of registers r2 to be moved to r1, and uses register addressing
D)  

Correct Answer :   causes contents of registers r2 to be moved to r1, and uses register addressing

296 .
For the infix expression (A/B) * (C * F + (A - D) * E) the corresponding Post fix notation is
A)  A / D * CF AD - F * +
B)  AB / C * FAD - E * + *
C)  AB / CF * AD - E * + *
D)  None of the above

Correct Answer :   AB / CF * AD - E * + *

297 .
A PC has typically_________
A)  5 to 10 KB of main memory
B)  10 to 100 KB of main memory
C)  100 to 256 KB of main memory
D)  256 KB to 1 MB of main memory

Correct Answer :   256 KB to 1 MB of main memory

298 .
Which characteristics of a memory chip is called dc characteristics?
A)  Organisation
B)  Physical dimensions
C)  Timing characteristics
D)  Power consumption and bus loading

Correct Answer :   Power consumption and bus loading

299 .
For Disk partitioning th DOS command is
A)  F DISK
B)  A DISK
C)  D DISK
D)  H DISK

Correct Answer :   F DISK

300 .
In 8085 the instruction MOV A, M is an example of
A)  Direct addressing
A)  
B)  Register addressing
B)  
C)  Immediate addressing
C)  
D)  Register indirect addressing
D)  

Correct Answer :   Register indirect addressing

301 .
Consider the following statements

1. A 33 MHz 486 has higher MIPS than 33 MHz 386.
2. A 33 MHz 486 has higher MFLOPS than 33 MHz 386 of these statements.
A)  Both are true
A)  
B)  Both are false
B)  
C)  1 is true and 2 is false
C)  
D)  1 is false and 2 is true
D)  

Correct Answer :   Both are true

302 .
The language PL / I has
A)  one character set having 48 characters
B)  one character set having 60 characters
C)  one character set having 60 characters and another character set having 48 character
D)  None of the above

Correct Answer :   one character set having 60 characters

303 .
Assume that x = 7, the Java operation x = x - means that final value of x is
A)  -1
B)  -6
C)  6
D)  7

Correct Answer :   -1

304 .
For most static RAM the write pulse width should be at least
A)  1 μs
B)  10 ns
C)  60 ns
D)  300 ns

Correct Answer :   60 ns

305 .
Which of the following is not a general purpose peripheral?
A)  I/O port
B)  Programmable interval timer
C)  Programmable CRT controller
D)  Programmable interrupt controller

Correct Answer :   Programmable CRT controller

306 .
When .9432 E - 4 is subtracted from .5452 E - 3 in normalized floating point mode
A)  .5452 E - 3 is changed to 5.452 E - 4 but .9432 E - 4 is not changed
B)  .9432 E - 4 is changed to .09432 E - 3 and .5452 E - 3 is not changed
C)  both Ihe numbers are changed and their exponents are, made equal to -5
D)  None of the above

Correct Answer :   .9432 E - 4 is changed to .09432 E - 3 and .5452 E - 3 is not changed

307 .
Consider the following program for 8085

MVIA, 00H
LXIH, OEAOFG
V LDAZ ADI 0005H

What does this program do?
A)  Adds decimal number 5 to contents of memory
A)  
B)  Adds decimal number 15 to contents of memory
B)  
C)  Subtracts decimal number 5 from contents of memory
C)  
D)  Subtracts decimal number 15 from contents of memory
D)  

Correct Answer :   Adds decimal number 5 to contents of memory

308 .
In static RAM 6264 the number of address inputs are
A)  10
B)  12
C)  13
D)  15

Correct Answer :   13

309 .
For most static RAM the maximum access time is about
A)  1 μs
B)  1 ns
C)  10 ns
D)  100 ns

Correct Answer :   100 ns

310 .
To realize the full power of 8086 the pin of 8086 connected to ground is
A)  ALE
B)  DEN
C)  INTR
D)  MN / MX

Correct Answer :   MN / MX

311 .
Which of the following expressions is invalid in Fortran?
A)  IA * B
B)  IA + IB
C)  - K * I + J
D)  IB * IC / ID

Correct Answer :   IA * B

312 .
In 8086 the number of lines on which data and address is multiplexed is
A)  8
B)  16
C)  20
D)  32

Correct Answer :   20

313 .
Which of the following has unique representation of 0?
A)  sign magnitude
B)  1's complement
C)  2's complement
D)  Both (A) and (B)

Correct Answer :   2's complement

314 .
Which DOS command improves memory usage?
A)  MOVE
B)  MEM IM
C)  Both (A) and (B)
D)  MEM MAKER

Correct Answer :   MEM MAKER

315 .
The chip 8254 is a 40 pin programmable interval timer. The number of its independent 16 bit counters is
A)  2
B)  3
C)  4
D)  5

Correct Answer :   5

316 .
The 8257 is able to accomplish the operation of
A)  read operation
B)  write operation
C)  verifying DMA operation
D)  All of the above

Correct Answer :   All of the above

Explanation : The 8257 can accomplish three types of operations and they are

i) verify DMA operation
ii) write operation
iii) read operation.

317 .
The bus is available when the DMA controller receives the signal
A)  HRQ
B)  DACK
C)  HLDA
D)  All of the above

Correct Answer :   HLDA

Explanation : If the HLDA signal is received by the DMA controller, it indicates that the bus is available.

318 .
To indicate the I/O device that its request for the DMA transfer has been honored by the CPU, the DMA controller pulls
A)  HRQ signal
B)  DACK (active low)
C)  HLDA signal
D)  DACK (active high)

Correct Answer :   DACK (active low)

Explanation : The DACK (active low) line of the used channel is pulled down by the DMA controller to indicate the I/O device that its request for the DMA transfer has been honored by the CPU.

319 .
If more than one channel requests service simultaneously, the transfer will occur as
A)  burst transfer
B)  multi transfer
C)  simultaneous transfer
D)  None of the above

Correct Answer :   burst transfer

Explanation : If more than one channel requests service simultaneously, then the transfer occurs as a burst or continuous transfer.

320 .
In 8257, if each device connected to a channel is assigned to a fixed priority then it is said to be in
A)  fixed priority scheme
B)  rotating priority scheme
C)  rotating priority and fixed priority scheme
D)  None of the above

Correct Answer :   fixed priority scheme

Explanation : In this scheme, the DRQ3 has the lowest priority followed by DRQ2 and DRQ1. The DRQ0 has the highest priority.

321 .
The register of 8257 that can only be written in is
A)  Status register
B)  DMA address register
C)  Mode set register
D)  Terminal count register

Correct Answer :   Mode set register

Explanation : The selected register may be read or written depending on the instruction executed by the CPU. But only write operation can be performed on the mode set register.

322 .
The priority of the channels varies frequently in
A)  fixed priority scheme
B)  rotating priority scheme
C)  rotating priority and fixed priority scheme
D)  None of the above

Correct Answer :   rotating priority scheme

Explanation : In this scheme, the priorities assigned to the channels are not fixed.

323 .
The registers that store the keyboard and display modes and operations programmed by CPU are
A)  Return buffers
B)  Display address registers
C)  I/O control and data buffers
D)  Control and timing registers

Correct Answer :   Control and timing registers

Explanation : The control and timing register to store the keyboard and display modes and other operations programmed by CPU.

324 .
The registers that hold the address of the word currently being written by the CPU from the display RAM are
A)  display RAM
B)  control and timing register
C)  display address registers
D)  control and timing register and timing control

Correct Answer :   display address registers

Explanation : The display address registers holds the address of the word currently being written or read by the CPU to or from the display RAM.

325 .
The mode that is programmed using "end interrupt/error mode set command" is
A)  scanned keyboard special error mode
B)  sensor matrix mode
C)  scanned keyboard with N-key rollover
D)  scanned keyboard mode with 2 key lockout

Correct Answer :   scanned keyboard special error mode

Explanation : The scanned keyboard special error mode is programmed using end interrupt/error mode set command. This mode is valid only under the N-key rollover mode.

326 .
When a key is pressed, the debounce circuit waits for 2 keyboard scans and then checks whether the key is still depressed in
A)  sensor matrix mode
A)  
B)  scanned keyboard with N-key rollover
B)  
C)  scanned keyboard special error mode
C)  
D)  scanned keyboard mode with 2 key lockout
D)  

Correct Answer :   scanned keyboard with N-key rollover

Explaination : In this mode, When a key is pressed, the debounce circuit waits for 2 keyboard scans and then checks whether the key is still depressed. If it is still depressed, the code is entered in FIFO RAM.

327 .
The FIFO status word is used to indicate the error in
A)  keyboard mode
B)  strobed input mode
C)  scanned sensor matrix mode
D)  keyboard and strobed input mode

Correct Answer :   keyboard and strobed input mode

Explanation : Overrun error occurs when an already full FIFO has attempted an entry. Underrun error occurs when an empty FIFO read is attempted.

328 .
The 80286 is able to address the physical memory of
A)  8 MB
B)  16 MB
C)  24 MB
D)  64 MB

Correct Answer :   16 MB

Explanation : The 80286 with its 24-bit address bus is able to address 16 Mbytes of physical memory.

329 .
The management of the memory system required to ensure the smooth execution of the running process is done by
A)  memory
B)  control unit
C)  bus interface unit
D)  memory management unit

Correct Answer :   memory management unit

Explanation : The memory management which is an important task of the operating system is now supported by a hardware unit called a memory management unit.

330 .
The process of making the physical memory free by storing the portion of program and partial results in the secondary storage called
A)  mapping
B)  pipelining
C)  swapping out
D)  swapping in

Correct Answer :   swapping out

Explanation : In swapping out, a portion of the program or important partial results required for further execution, may be saved back on secondary storage to make the physical memory free, for further execution of another required portion of the program.

331 .
The memory that is considered as a large logical memory space, that is not available physically is
A)  virtual memory
B)  logical memory
C)  auxiliary memory
D)  imaginary memory

Correct Answer :   virtual memory

Explanation : To the user, there exists a very large logical memory space, which is actually not available called virtual memory. This does not exist physically in a system. It is however, possible to map a large virtual memory space onto the real physical memory.

332 .
The 80286 is an upward object code compatible with 8086 or 8088 when operated in
A)  normal mode
B)  real address mode
C)  virtual address mode
D)  real and virtual address mode

Correct Answer :   real and virtual address mode

Explanation : The 80286 is operated in two modes, namely real address mode and virtual address mode. In both the modes, the 80286 is compatible with 8086/8088.

333 .
Which of the following is not a block of an architecture of 80287?
A)  bus control logic
B)  floating point unit
C)  data interface and control unit
D)  None of the above

Correct Answer :   None of the above

Explanation : The three blocks of an internal architecture of 80287 are:

1. bus control logic
2. data interface and control unit
3. floating point unit.

334 .
The data interface and control unit consists of
A)  instruction decoders
B)  status and control words
C)  tag words and error pointers
D)  All of the above

Correct Answer :   All of the above

Explanation : The data interface and control unit contains status and controls words, TAG words and error pointers.

335 .
The bits that are modified depending upon the result of the execution of arithmetic instructions are
A)  masking bits
B)  condition code bits
C)  error summary bits
D)  rounding control bits

Correct Answer :   condition code bits

Explanation : The condition code bits are similar to the flags of a CPU. These are modified depending upon the result of the execution of arithmetic instructions.

336 .
After reset of 80287, the control bit that is initialized to zero is
A)  masking bits
B)  infinity control bits
C)  rounding control bits
D)  precision control bits

Correct Answer :   infinity control bits

Explanation : The infinity control bit is initialized to zero after reset.

337 .
The arrangement of data that is to be shifted successively, whenever required for the execution, is done by
A)  barrel shifter
B)  data buffer
C)  error pointer
D)  None of the above

Correct Answer :   barrel shifter

Explanation : The barrel shifter arranges and presents the data to be shifted successively, whenever required for the execution.

338 .
The 8089 shares the system bus and memory with the host CPU in
A)  tightly coupled configuration
B)  loosely coupled configuration
C)  tightly and loosely coupled configurations
D)  None of the above

Correct Answer :   tightly coupled configuration

Explanation : In a tightly coupled configuration, the 8089 shares the system bus and memory with the host CPU using its RQ (active low) or GT (active low) pins.

339 .
The 8089 communicates with the host CPU using bus arbiter and controller in
A)  tightly coupled configuration
B)  loosely coupled configuration
C)  tightly and loosely coupled configurations
D)  None of the above

Correct Answer :   loosely coupled configuration

Explanation : In a loosely coupled configuration, the 8089 has its own local bus and communicates with the host CPU using bus arbiter and controller.

340 .
The IO device that can be interfaced with 8089 is
A)  8-bit IO
B)  16-bit IO
C)  64-bit IO
D)  16-bit and 8-bit IO

Correct Answer :   16-bit and 8-bit IO

Explanation : The 8089 handled IO devices need not have the same data bus width as that of 8089. This enables even 8-bit IO devices to be interfaced easily with 8089.

341 .
In the 8089 architecture, the address of memory table for channel-2 is calculated by
A)  adding 16 to the contents of CCP
B)  adding memory table address of channel-1
C)  adding 8 to the contents of CCP
D)  None of the above

Correct Answer :   adding 8 to the contents of CCP

Explanation : The address of the memory table for channel-2 is calculated by adding 8 to the contents of CCP or by adding memory table address for channel-1 to the contents of CCP.

342 .
The registers that are used as source and destination pointers during DMA operations are
A)  GB, GC
B)  GC, BC
C)  GA, GB
D)  GC, GA

Correct Answer :   GA, GB

Explanation : GA register is used as source and GB as destination pointers during DMA operations.

343 .
The pin that is used for data transfer control and operation termination signals is
A)  EXT
B)  SINTR
C)  DRQ and EXT
D)  RQ (active low) or GT (active low)

Correct Answer :   DRQ and EXT

Explanation : The DRQ and EXT are used for data transfer control and operation termination signals during DMA operations.

344 .
The pin that is used to inform the CPU that the previous operation is completed is
A)  SINTR
B)  DRQ
C)  RQ (active low)
D)  GT (active low)

Correct Answer :   SINTR

Explanation : The SINTR pins are used by the channels either to inform the CPU that the previous operation is over or to ask for its attention or interference if required, before the completion of the task.

345 .
The 80386DX is a processor that supports
A)  8-bit data operand
B)  16-bit data operand
C)  32-bit data operand
D)  All of the above

Correct Answer :   All of the above

Explanation : The 80386DX is a 32-bit processor that supports, 8-bit/16-bit/32-bit data operands.

346 .
The 80386DX has an address bus of
A)  8 address lines
B)  16 address lines
C)  32 address lines
D)  64 address lines

Correct Answer :   32 address lines

Explanation : The 80386, with its 32-bit address bus, can address up to 4 GB of physical memory.

347 .
The 80386 enables itself to organize the available physical memory into pages, which is known as
A)  paging
B)  segmentation
C)  memory division
D)  None of the above

Correct Answer :   paging

Explanation : The concept of paging which is introduced in 80386, enables it to organize the available physical memory into pages of size 4 KB each, under the segmented memory.

348 .
The 80386 in protected mode, supports all software written for
A)  8086 and 80287
B)  80286 and 8086
C)  80286 and 80287
D)  80287 and 80387

Correct Answer :   80286 and 8086

Explanation : The 80386 in protected mode, supports all software written for 8086 and 80286 (to be executed under the control of memory management and protection abilities of 80386).

349 .
The operating frequency of 80386DX is
A)  12 MHz and 20 MHz
B)  20 MHz and 33 MHz
C)  32 MHz and 12 MHz
D)  All of the above

Correct Answer :   20 MHz and 33 MHz

Explanation : The operating frequency of 80386DX is 20MHz and 33 MHz.

350 .
The 80386 consists of
A)  on-chip address translation cache
B)  virtual memory space of 64TB
C)  instruction set of predecessors with upward compatibility
D)  All of the above

Correct Answer :   All of the above

Explanation : The 80386 has on-chip address translation cache, and the instruction set is upward compatible with all its predecessors.

351 .
80386DX is available in a grid array package of
A)  64 pin
B)  128 pin
C)  132 pin
D)  142 pin

Correct Answer :   132 pin

Explanation : The 80386DX is available in a 132-pin grid array package.

352 .
The 16-bit registers are available with their extended size of 32 bits, by adding the registers with a prefix of
A)  E
B)  X
C)  XX
D)  32

Correct Answer :   E

Explanation : A 32 bit register, known as an extended register, is represented by the register name with a prefix of E.

353 .
Which of the following is a data segment register of 80386?
A)  ES
B)  FS
C)  GS
D)  All of the above

Correct Answer :   All of the above

Explanation : The six segment registers available in 80386 are CS, SS, DS, ES, FS and GS, out of which DS, ES, FS and GS are the four data segment registers.

354 .
The VM (virtual mode) flag is to be set, only when 80386 is in
A)  virtual mode
B)  protected mode
C)  either virtual or protected mode
D)  All of the above

Correct Answer :   protected mode

Explanation : If VM flag is set, the 80386 enters the virtual 8086 mode within the protected mode. This is to be set only when the 80386 is in protected mode.

355 .
In protected mode of 80386, the VM flag is set by using
A)  IRET instruction
B)  Task switch operation
C)  IRET instruction or task switch operation
D)  None of the above

Correct Answer :   IRET instruction or task switch operation

Explanation : The VM flag can be set using the IRET instruction or any task switch operation, only in the protected mode.

356 .
During the instruction cycle of 80386, any debug fault can be ignored if
A)  RF is set
B)  RF is cleared
C)  VM flag is set
D)  VM flag is cleared

Correct Answer :   RF is set

Explanation : If RF (resume flag) is set, any debug fault is ignored during the instruction cycle.

357 .
If the 80386 enters the protected mode from the real address mode, then it returns back to the real mode, by performing the operation of
A)  reset
B)  read
C)  write
D)  terminate

Correct Answer :   reset

Explanation : If the 80386 enters the protected mode from the real address mode, then it cannot return back to the real mode without a reset operation.

358 .
The number of pages that the paging unit allows, in the virtual mode of 80386 is
A)  64
B)  128
C)  256
D)  512

Correct Answer :   256

Explanation : In virtual mode, the paging unit allows only 256 pages, each of 4Kbytes size. Each of the pages may be located anywhere within the maximum 4Gbytes physical memory.

359 .
The privilege level at which the real mode programs are executed is
A)  level 3
B)  level 2
C)  level 1
D)  level 0

Correct Answer :   level 0

Explanation : The real mode programs are executed at the highest privilege level i.e. level 0.

360 .
If the CKM pin of 80387 is high, then 80387 is operated in
A)  protected mode
B)  synchronous mode
C)  real address mode
D)  asynchronous mode

Correct Answer :   synchronous mode

Explanation : If the CKM pin of 80387 is high, then 80387 is operated in synchronous mode. If it is low, then 80387 is operated in asynchronous mode.

361 .
To inform 80387 that the CPU wants to communicate with NPS1, the NPS1 line is directly connected to
A)  A30
B)  A31
C)  D31
D)  M/IO

Correct Answer :   M/IO

Explanation : The NPS1 and NPS2 lines are directly connected with M/IO and A31 respectively, to inform 80387 that the CPU wants to communicate with it (NPS1), and it is using one of the reserved I/O addresses for 80387 (NPS2).

362 .
The sizes of instruction and data pointer registers of 80387 respectively are
A)  32-bit, 32-bit
B)  32-bit, 48-bit
C)  48-bit, 32-bit
D)  48-bit, 48-bit

Correct Answer :   48-bit, 48-bit

Explanation : 80387 consists of two 48-bit registers, known as instruction and data pointer registers.

363 .
Which of the following is a resource sharing strategy that had been investigated by the developers?
A)  full sharing
B)  threshold sharing
C)  partitioned resources
D)  All of the above

Correct Answer :   All of the above

Explanation : Several resource sharing strategies have been investigated by the developers. Some of these are

1. Partitioned resources
2. Threshold sharing
3. Full sharing.

364 .
The instruction that is used when either of the logical processors is idle is
A)  HALT
B)  HLDA
C)  HOLD
D)  None of the above

Correct Answer :   HALT

Explanation : An optimization may require the use of HALT instruction, when either of the two logical processors is idle.

365 .
The HALT instruction is a privileged instruction that can be only used by
A)  control unit
B)  memory unit
C)  operating system
D)  execution unit

Correct Answer :   operating system

Explanation : The HALT instruction is a privileged instruction that can be only used by operating system.

366 .
The Xeon TM processor on which hyperthreading technology was first implemented consists of
A)  one logical processor per physical processor
B)  two logical processor per physical processor
C)   three logical processor per physical processor
D)  zero logical processor per physical processor

Correct Answer :   two logical processor per physical processor

Explanation : The Xeon TM processor on which hyperthreading technology was first implemented consists of two logical processor per physical processor.

367 .
The dynamic branch prediction algorithms use
A)  Branch History Table (BHT)
B)  Branch Target Buffer (BTB)
C)  Branch History Table and Branch Target Buffer
D)  None of the above

Correct Answer :   Branch History Table and Branch Target Buffer

Explanation : The dynamic branch prediction algorithms use two types of tables, namely Branch History Table (BHT) and Branch Target Buffer (BTB).

368 .
Each logical processor has_________
A)  one 32-byte streaming buffer
B)  one 64-byte streaming buffer
C)  two 32-byte streaming buffers
D)  two 64-byte streaming buffers

Correct Answer :   two 64-byte streaming buffers

Explanation : Each logic processor has its own set of two 64-byte streaming buffers, which store the instruction bytes and subsequently they are dispatched to the instruction decode stage.

369 .
The Instruction Translation Lookaside Buffer(ITLB) is present in
A)  logical processors
B)  trace cache
C)  instruction decoder
D)  All of the above

Correct Answer :   logical processors

Explanation : Since there are two logical processors, there are two ITLBs. Thus each logical processor has its own ITLB and its own instruction pointer to track the progress of instruction fetch for each of them.

370 .
The register that may be used as an operand register is
A)  Accumulator
B)  B register
C)  Data register
D)  Accumulator and B register

Correct Answer :   Accumulator and B register

Explanation : In some instructions, the Accumulator and B register are used to store the operands.

371 .
Which of the processor's stack does not contain the top-down data structure?
A)  8051
B)  8086
C)  80286
D)  80386

Correct Answer :   8051

Explanation : The 8051 stack is not a top-down data structure, like other Intel processors.

372 .
The transmit buffer of serial data buffer is a
A)  serial-in serial-out register
B)  parallel-in serial-out register
C)  serial-in parallel-out register
D)  parallel-in parallel-out register

Correct Answer :   parallel-in serial-out register

Explanation : The transmit buffer of serial data buffer is a parallel-in serial-out register.

373 .
The registers that are not accessible by the user are
A)  IP and IE
B)  TMP1 and TMP2
C)  Instruction registers
D)  Accumulator and B register

Correct Answer :   TMP1 and TMP2

Explanation : The arithmetic operations are performed over the operands held by the temporary registers, TMP1 and TMP2. Users cannot access these temporary registers.

374 .
The register that provides control and status information about serial port is
A)  IE
B)  IP
C)  TSCON
D)  PCON and SCON

Correct Answer :   PCON and SCON

Explanation :  The registers, PCON and SCON contain control and status information about serial port.

375 .
The bits that control the external interrupts are
A)  ET0 and ET1
B)  ET1 and ET2
C)  EX0 and EX1
D)  EX1 and EX2

Correct Answer :   EX0 and EX1

Explanation : The bits, EX0 and EX1 individually control the external interrupts, INT0(active low) and INT1(active low). If INT0(active low) and INT1(active low) interrupts are to be enabled then the bits EX0 and EX1 must be set respectively.

376 .
The minimum duration of the active low interrupt pulse for being sensed without being lost must be
A)  equal to one machine cycle
B)  equal to 2 machine cycles
C)  greater than one machine cycle
D)  greater than 2 machine cycles

Correct Answer :   equal to one machine cycle

Explanation : The minimum duration of the active low interrupt pulse should be equal to the duration of one machine cycle for being sensed, else it will be lost.

377 .
For an interrupt to be guaranteed served it should have duration of
A)  one machine cycle
B)  two machine cycles
C)  three machine cycles
D)  four machine cycles

Correct Answer :   two machine cycles

Explanation : For an interrupt to be guaranteed served it should have duration of two machine cycles.

378 .
The operation that can be performed on control word register is
A)  read operation
B)  write operation
C)  read and write operations
D)  None of the above

Correct Answer :   write operation

Explanation : The control word register can only be written and cannot be read.

379 .
In mode 2, if N is loaded as the count value, then after (N-1) cycles, the output becomes low for
A)  1 clockcycle
B)  2 clockcycles
C)  3 clockcycles
D)  4 clockcycles

Correct Answer :   1 clockcycle

Explanation : After (N-1) cycles, the output becomes low for only 1 clockcycle. If the count N is reloaded and again the output becomes high and remains so for (N-1) clock pulses.

380 .
In control word format, if RL1=1, RL0=1 then the operation performed is
A)  read/load least significant byte only
B)  read/load most significant byte only
C)  read/load LSB first and then MSB
D)  read/load MSB first and then LSB

Correct Answer :   read/load LSB first and then MSB

Explanation : To access 16 bit, first LSB is loaded first, and then MSB.

381 .
The control word register contents are used for
A)  selection of counters
B)  choosing binary/BCD counters
C)  initializing the operating modes
D)  All of the above

Correct Answer :   All of the above

Explanation : The control word register contents are used for :

i) initializing the operating modes (mode 0-mode 4)
ii) selection of counters (counter0-counter2)
iii) choosing binary or BCD counters
iv) loading of the counter registers.

382 .
The range of floating point numbers in Java is
A)  1.4 E - 38 to 3.4 E + 45
B)  3.4 E - 38 to 1.4 E + 45
C)  3.4 E - 45 to 1.4 E + 38
D)  1.4 E - 45 to 3.4 E + 38

Correct Answer :   1.4 E - 45 to 3.4 E + 38

383 .
Which of the following is a valid FORTRAN assignment statement?
A)  A = B
B)  10 = N
C)  A = B = 1
D)  X + 2.1 = 5.6

Correct Answer :   A = B

384 .
In 8085 microprocessor with memory mapped I/O which of the following is true?
A)  Logic operations can not be performed
B)  I/O devices have 16 bit addresses
C)  I/O devices are accessed during IN and OUT instructions
D)  There can be a maximum of 256 input and 256 output devices

Correct Answer :   I/O devices have 16 bit addresses

385 .
Which of the following 8 bit microprocessors has maximum addressing modes?
A)  Z 80
B)  6800
C)  6809
D)  8085

Correct Answer :   6809

386 .
In setting up 'for' loops in Pascal, the initial and final values of index may be
A)  integer constants
B)  integer constants or real constants
C)  Integer constants or integer variable names
D)  integer constants or integer variable names or integer expressions

Correct Answer :   integer constants or integer variable names or integer expressions

387 .
In a 3 byte instruction of 8085, the first, second and third byte respectively indicate
A)  operation code, low order byte of data/address and high order byte of data / address
B)  low order byte of data / address, high order byte of data / address and operation code
C)  high order byte of data / address, low order byte of data / address and operation code
D)  high order byte of data / address, operation code and low order byte of data / address

Correct Answer :   operation code, low order byte of data/address and high order byte of data / address

388 .
Microprocessor 386SX is a 16/32 bit microprocessor. It has
A)  16 bit registers and 16 bit data bus
B)  32 bit register and 16 bit data bus
C)  16 bit registers and 32 bit data bus
D)  32 bit registers and 32 bit data bus

Correct Answer :   32 bit register and 16 bit data bus

389 .
The contents of F register in 8085 are 01010001. This means
A)  S = 1, Z = 1, AC = 1, P = 0 and CY=1
B)  S = 1, Z = 0, AC = 0, P = 0 and CY=1
C)  S = 0, Z = 1, AC = 1, P = 0 and CY=1
D)  S = 1, Z = 0, AC = 1, P = 0 and CY=1

Correct Answer :   S = 0, Z = 1, AC = 1, P = 0 and CY=1

390 .
The four types of integers in Java are called
A)  bit, byte, short and long
B)  byte, short, int and long
C)  nibble, byte, int and long
D)  nibble, byte, short and long

Correct Answer :   byte, short, int and long

391 .
Which of the following is not an interrupt line in 8085?
A)  TRAP
B)  RST 5.5
C)  RST 7.5
D)  RST 9.5

Correct Answer :   RST 9.5

392 .
The general purpose register code for accumulator in 8085 is
A)  111
B)  000
C)  001
D)  1111

Correct Answer :   111

393 .
In 8085, high level on INTR line can be recognised only if
A)  TRAP and RST lines are high
B)  RST line is high but not TRAP line
C)  TRAP and RST lines are not high
D)  TRAP line is high but not RST line

Correct Answer :   TRAP and RST lines are not high

394 .
In Pascal an array declaration provides information to the Pascal processor to enable it to
A)  identify the variable as an array name
B)  reserve memory locations to store all the components of array
C)  check the values computed for subscripts expressions during program execution with the specified lower and upper limits of subscripts
D)  All of the above

Correct Answer :   All of the above

395 .
Which of the following instructions have only one operand?
A)  Add
B)  Shift
C)  Multiply
D)  Subtract

Correct Answer :   Shift

396 .
'Rotate instruction' in microprocessor belongs to
A)  logic group
B)  branch group
C)  arithmetic group
D)  data transfer group

Correct Answer :   logic group

397 .
The number of pins in microprocessor 8086 is
A)  30
B)  40
C)  50
D)  60

Correct Answer :   40

398 .
In super computers the extra level of primary memory is generally called
A)  Single stage device
B)  Digital state device
C)  Solid state device
D)  Surface stage device

Correct Answer :   Solid state device

399 .
In the dimension statement DIMENSION A (50, 50), K (100, 100) the total number of locations reserved will be
A)  2500
B)  100000
C)  125000
D)  250000

Correct Answer :   125000

400 .
If I = J = K = 13, then in Fortran 1 = 10 - (1 / 10) * 10 + (J / 5) * 4 + K ** (- 2) is equal to
A)  5
B)  6
C)  7
D)  8

Correct Answer :   8

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